Semiconductor packaging structure for stacking and manufacturing method thereof
A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc.
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[0018] The description of the following embodiments refers to the attached drawings to illustrate specific embodiments that the present invention can be implemented. Furthermore, the directional terms mentioned in the present invention, such as "up", "down", "front", "rear", "left", "right", "in", "out" or "side", etc., Only refer to the direction of the attached drawings. Therefore, the directional terms used are used to describe and understand the present invention, rather than to limit the present invention.
[0019] Please refer to figure 1 As shown, the semiconductor package structure for stacking of the first embodiment of the present invention is mainly applied to a lower package 100 as a package-on-package (POP), and is used to combine an upper package 200. In the following, the The semiconductor package structure used for stacking is directly referred to as the lower package body 100. In this embodiment, the lower package body 100 includes a base substrate 10, a chip 1...
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