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Ball grid array (BGA) packaging device chip-scale invalidation positioning fixture and method

A technology for packaging devices and failure location, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of not being able to customize, expensive, affecting the accuracy of failure analysis and judgment, and achieving simple and safe adjustment operations. , high efficiency and accuracy

Active Publication Date: 2014-12-31
FIFTH ELECTRONICS RES INST OF MINIST OF IND & INFORMATION TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This means that when locating the failure point, each BGA device with the number of solder balls and the overall size needs to correspond to a fixture, which is not only time-consuming (about half a month from drawing the fixture layout to the successful customization), but also costly (due to the amount of customization) Only 1 or 2, the price is very expensive, and you can’t even find a custom-made party), it also consumes manpower, which greatly affects the progress of failure analysis, this method is not feasible
[0005] Another method is: directly solder the leads to the problematic solder ball pins to realize electrical connection. If the solder balls are located at the non-edge parts of the ball grid array, or even at the off-centre position, it is easy to be damaged by soldering lead wires. Due to its curvature, the placement of BGA devices is no longer flat, and a certain angle is formed between the chip and the placement plane, which affects the subsequent detection of chip failure points and imaging effects, and will inevitably affect the accuracy of failure analysis and judgment.

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  • Ball grid array (BGA) packaging device chip-scale invalidation positioning fixture and method
  • Ball grid array (BGA) packaging device chip-scale invalidation positioning fixture and method
  • Ball grid array (BGA) packaging device chip-scale invalidation positioning fixture and method

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Embodiment Construction

[0021] Referring to the steps of general integrated circuit IC failure analysis, the present invention proposes a failure location fixture and method suitable for chip-level failure of BGA packaged devices (hereinafter referred to as devices or BGA devices). The present invention will be explained in detail below in conjunction with the accompanying drawings and embodiments.

[0022] Chip-level failure positioning fixture for BGA packaged devices of the present invention, its top view is as follows figure 1 As shown, it includes a bottom plate 101 with 4 grooves 501 , 4 clamping sliders 201 with stepped loading platforms, 4 guide pins 301 , and 4 fastening screws 401 . figure 2 for figure 1 A-A direction sectional view, image 3 for figure 2 Sectional view of B-B direction. The clamping slider 201 is positioned on the bottom plate by the guide pin 301, and the required position (according to the size of the device) is adjusted by the fastening screw 401 sliding between t...

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Abstract

The invention discloses a ball grid array (BGA) packaging device chip-scale invalidation positioning fixture, which adopts a clamping sliding block to bear a BGA packaging device to be positioned; when the clamping sliding block slides to a proper position on a groove of a bottom plate; the position of the clamping sliding block is fixed by fastening screws; and therefore the device is firmly and tightly clamped. Because the position of the clamping sliding block is adjustable, the fixture is suitable for the BGA packaging devices of various sizes, and is simple and safe to regulate and operate, and the chip surface of the clamped device is smooth and can not be blocked. The invention also discloses a BGA packaging device chip-scale invalidation positioning method, which comprises the following steps of: determining a failed pin of the device, and welding an electrical lead onto the failed pin; clamping the device by the fixture; electrifying the electrical lead, and controlling voltage; determining a failed point by observing a luminescence image on the chip surface of the device and an optical reflection image on the surface; of the device so as to finish the invalidation positioning. Because the above fixture is adopted, the failed point detection of the invalidation positioning method disclosed by the invention has higher efficiency and accuracy.

Description

technical field [0001] The invention relates to the technical field of testing BGA packaged devices, in particular to a chip-level failure location fixture and method for BGA packaged devices. Background technique [0002] Ball grid array packaging (BGA) is easy to achieve high-density, high-performance and miniaturized packaging of chips, and has become the best choice for multi-functional and high I / O pin packaging in recent years, such as CPU, DSP, FPGA and other high-end devices. widely used. [0003] The actual application process of BGA devices involves multiple processes such as storage, transportation, reliability testing, and use. Under the action of various comprehensive environmental stress conditions such as high temperature, electricity, and water vapor, failures will inevitably occur. When BGA device failure is caused by common chip-level failure mechanisms (such as ultra-thin gate oxide breakdown, soft breakdown, hot carrier effect, CMOS latch-up effect, junc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/683
Inventor 林晓玲刘玉清
Owner FIFTH ELECTRONICS RES INST OF MINIST OF IND & INFORMATION TECH