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Novel grid structure for RF-LDMOS (Radio Frequency-Laterally Diffused Metal Oxide Semiconductor) device

A technology of RF-LDMOS and gate structure, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problem of reducing power gain and achieve the effect of reducing gate resistance and improving power gain

Active Publication Date: 2012-10-31
KUNSHAN HUATAI ELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The increase in gate resistance severely affects Fmax, reducing power gain

Method used

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  • Novel grid structure for RF-LDMOS (Radio Frequency-Laterally Diffused Metal Oxide Semiconductor) device
  • Novel grid structure for RF-LDMOS (Radio Frequency-Laterally Diffused Metal Oxide Semiconductor) device
  • Novel grid structure for RF-LDMOS (Radio Frequency-Laterally Diffused Metal Oxide Semiconductor) device

Examples

Experimental program
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Effect test

Embodiment 1

[0027] This embodiment describes an N-type LDMOS used in RF-LDMOS devices, its structure is as follows figure 2 As shown, it includes the RF-LDMOS basic structure 1, and the RF-LDMOS basic structure 1 includes the lowermost heavily doped substrate 2 region, the epitaxial layer 3 on the heavily doped substrate 2 region, and the epitaxial layer 3 Above the gate 13, the epitaxial layer 3 is provided with a heavily doped source region 8 and a heavily doped drain region 6, and the heavily doped source region 8 and the heavily doped drain region 6 are respectively located on different sides of the gate 13. On the side, a channel region 9 and a drain drift region 5 are sequentially arranged between the heavily doped source region 8 and the heavily doped drain region 6 in the epitaxial layer 3, and the channel region 9 and the The heavily doped source region 8 is in contact with the drain drift region 5, and a heavily doped connection or a trench 4 filled with a conductor is arranged...

Embodiment 2

[0031] The basic structure of this embodiment is the same as that of Embodiment 1, except that the gate extension layer 14 covering the gate 13 completely covers the gate 13, and extends to the heavily doped source region 8 for a short distance, and to the heavily doped source region 8. The distance over which the drain region 6 extends is relatively long. In this way, the width of the heavily doped source region 8 can be made relatively small, which can reduce the series resistance of the section of the heavily doped source region 8 .

Embodiment 3

[0033] The basic structure of this embodiment is the same as that of Embodiment 1, except that the gate extension layer 14 covering the gate 13 completely covers the gate 13, and the distance extending to the heavily doped source region 8 is zero, and the distance extending to the heavily doped source region 8 is zero. The extended distance of the miscellaneous drain region 6 is relatively long.

[0034] Extending more toward the drain end, the gate extension layer 14 will have a long overlapping area with the drain drift region 5 below, and this overlapping area is equivalent to a field plate. When the amplitude of the input signal is relatively high, the gate extension layer 14 has a relatively high forward voltage. At this time, a part of electrons will be attracted into the drain drift region 5, which will reduce the resistance of the drain drift region 5 and reduce the conductivity. on-resistance, thereby improving efficiency. And when the amplitude of the input signal i...

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Abstract

The invention discloses a novel grid structure for an RF-LDMOS (Radio Frequency-Laterally Diffused Metal Oxide Semiconductor) device. A layer of grid extension layer (which can be made of a heavily-doped semiconductor such as polycrystalline silicon or a metal silicide, or even a metal) is covered on the conventional grid structure, the width of a grid depends on the minimum grid length of the LDMOS, the length is reduced continuously along with the reduction of a process characteristic scale, but the grid resistance of the LDMOS is increased continuously under the condition of the same grid width. A grid extension layer is formed on a grid, the width can be increased, and the grid resistance can be reduced under the condition of the same grid width, so that the power gain is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a novel gate structure for RF-LDMOS devices. Background technique [0002] Compared with traditional CMOS, Si-based RF-LDMOS has a drift region, which improves the breakdown voltage of the device. High breakdown voltage can improve output power and power density. At present, RF-LDMOS is mainly used in the S-band, and the working frequency is less than 4GHz. LDMOS has very low cost, and excellent linearity. At present, people are increasingly hoping to improve the operating frequency range of RF-LDMOS so that it can work in the C-band or even the K-band. Improving the operating frequency of RF-LDMOS means increasing Ft and Fmax. There are two main methods: 1. Reducing the resistance of the drift region, which can be achieved through the following two aspects: a. Adjusting the distribution of doping concentration in the drift region. b. is to reduce the length of the LDM...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/423
Inventor 曾大杰余庭张耀辉
Owner KUNSHAN HUATAI ELECTRONICS TECH CO LTD
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