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Semiconductor device and manufacturing method thereof

A semiconductor and device technology, applied in the field of semiconductor devices and their manufacturing, can solve problems such as limiting the proximity of SiGe to the channel, and achieve the effects of improving short channel effect, increasing stress, and improving performance

Inactive Publication Date: 2012-11-14
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, for the existing two-level recessed SiGe source / drain structure, as shown in FIG. SiGe proximity to channel

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
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no. 1 example

[0037] In this embodiment, a semiconductor device with a two-level recessed SiGe source / drain structure and a manufacturing method thereof are proposed, wherein after the substrate is etched for the first time, the silicon substrate is heated, Silicon reflow occurs, at least changing the shape of the sidewall of the groove near the gate, so that the front end of the groove is closer to the edge of the gate or even aligned with the edge of the gate. The manufacturing method will be described in more detail below.

[0038] First, if Figure 2A As shown, a gate insulating layer 202 and a gate 203 are formed on a substrate 201 , and spacers 204 are respectively formed on both sides of the gate 203 . The spacer 204 may have a thickness of 5 nm to 10 nm. The spacer 204 may be a material such as silicon nitride, silicon oxide, or the like. The material of the spacer 204 may be deposited using a method such as chemical vapor deposition (CVD). Optionally, after the gate 203 is form...

no. 1 example 1

[0047] Like the first embodiment, in this embodiment, the upper edges of the source extension region and the drain extension region on the side close to the gate can extend below the spacer 204 , even aligning with the sidewall of the gate. By bringing SiGe closer to the gate edge, the stress in the channel can be increased, thereby improving the performance of the semiconductor device. In this embodiment, silicon reflow can also improve the surface roughness of the entire groove and recess, and improve the Si / SiGe interface formed subsequently.

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Abstract

The invention discloses a semiconductor device and a manufacturing method thereof. The manufacturing method includes forming a gate insulation layer and a gate on a substrate; forming spacers on two sides of the gate respectively; using the gate and the spacers as masks to etch the substrate to form a groove; forming fake side walls on two sides of each of the spacers respectively; using the gate, the spacers and the fake side walls as masks to etch the substrate to form a recessed portion; removing the fake side walls; and filling SiGe in the groove and the recessed portion to form a source and drain extension region and a source or drain region of the semiconductor device, wherein the recessed portion is deeper than the groove; and before the step of filling the SiGe, the method further includes heating the substrate to enable a material of the substrate to reflow so as to at least change the shape of one side wall of the groove, and the side wall of the groove is close to the gate.

Description

technical field [0001] The present invention relates to a semiconductor device and a manufacturing method thereof, in particular to a semiconductor device having a source / drain structure embedded in silicon germanium (SiGe) and a manufacturing method thereof. Background technique [0002] Increasing the carrier mobility in the channel region can increase the driving current of the field effect transistor and improve the performance of the device. An effective mechanism to increase carrier mobility is to induce stress in the channel. Although various channel stress techniques have been proposed, for pMOSFETs, embedded SiGe technology provides the most effective stress enhancement. Embedded SiGe technology has been widely used in modern CMOS technology to improve the performance of pMOSFET. [0003] The paper "A High Performance pMOSFET with Two-step Recessed SiGe-S / D Structure for 32nm node and Beyond" by N.Yasutake et al. (Solid-State Device Research Conference, 2006, Proc...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L29/78H01L29/10
CPCH01L29/7833H01L21/3247H01L29/7848H01L29/66636H01L29/7834H01L29/165H01L29/6653H01L29/66598
Inventor 李凡张海洋
Owner SEMICON MFG INT (SHANGHAI) CORP