Apparatus and methods for cyclical oxidation and etching

Abstract

Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and / or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device.

Description

technical field [0001] Embodiments of the present invention generally relate to the field of semiconductor manufacturing processes and semiconductor devices, and more particularly, to apparatus and methods for manufacturing devices suitable for narrow pitch applications. Background technique [0002] Shrinking semiconductor devices by simply shrinking the device structure often fails to produce acceptably small-scale structures. For example, in NAND flash memory devices, when the floating gate is scaled down, the capacitive coupling (eg, sidewall capacitance) of the floating gate is therefore scaled down with the surface area of ​​the floating gate. Thus, the smaller the surface area of ​​the floating gate, the smaller the capacitive coupling between the floating gate and, for example, the control gate. In general, the choice of sacrificing capacitive coupling for size reduction is acceptable as long as the NAND memory device remains operational. Unfortunately, scaling Si...

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Problems solved by technology

Unfortunately, as the device node becomes small enough that the capacitive coupling between the floating gate and the control gate becomes too small to effectively operate the device at allowable operating voltages, shrinking size is limited

Additionally, the parasitic capacitance (i.e., noise) between adjacent floating gates increases beyond the limits of system controller read errors in NAND memory devices

Therefore, it is impossible to have a functional NAND device under this condition

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