Fast fourier transformation (FFT) parallel method based on multi-core digital signal processor (DSP) platform

Abstract

The invention provides a fast fourier transformation (FFT) parallel method based on a multi-core digital signal processor (DSP) platform. The method comprises the following steps that: a main processor uniformly distributes data of an original point N to be subjected to FFT to all P processors; sub FFT is executed on a point N / P on each processor, and thus FFT results of the previous log2(N / P) levels of the original point N are obtained; and due to data interaction between the processors, so that FFT from the log2(N / P)th level to the log2(N-1)th level of the original point N can be finished. During data interaction, the standard whether the number of the processors meets the equation i%t=i%(2t) is used for selecting an interaction object of the processors, so that the communication distance between the processors is shortest, and the operation efficiency is improved.

Description

technical field [0001] The invention relates to a fast Fourier transform FFT processing technology, in particular to an FFT processing technology based on a multi-core digital signal processor DSP. Background technique [0002] Discrete Fourier transform (DFT) is an important transformation in digital signal analysis and processing, but its application is greatly limited due to its computational complexity. Since T.W.Coody and J.W.Tukey proposed the method of quickly calculating DFT, people have been exploring and improving the FFT algorithm on this basis. Over the years, they have successively proposed radix 2FFT, radix 4FFT, hybrid Fast algorithms such as radix FFT and split radix FFT. Each kind of FFT transformation is divided into two kinds of decimation by frequency and decimation by time. [0003] At present, in scientific and engineering practice, the most widely used is base-2FFT, that is, the number of FFT points is N=2 M , where M is a positive integer. [0004...

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Problems solved by technology

2011.01.05 Chinese patent application CN 101937422A proposed a FFT parallel method based on a GPU many-core platform. The parallel FFT implementation on the GPU platform only emphasized the parallel operation of many cores, and did not disclose the communication rate and header between cores. Adequate attention and research to department expenditure

Liu Boda and others disclosed a configurable multi-core parallel FFT algorithm in an LTE system on China Integrated Circuit P24-28. They only split and realized the two-core and four-core environments, and did not carry out the scalability scheme of the algorithm. Discussion, and the implementation platform of this scheme is in FPGA, when the calculation amount is relatively large, more dedicated hardware chips are required, the power consumption of the system will be relatively large, and it is not easy to implement software radio

Zhong Cui-xiang and Han Guo-qiang proposed a parallel FFT algorithm (Some New Parallel Fast Fourier Transform) at the Sixth International Conference on Parallel and Distributed Computing in 2005. Alogrithms), but the algorithm is more complicated when dealing with the interaction between processors

In System Engineering and Electronic Technology 2003 (10): 1192-1196 published by Liu Li et al. in 2003, the multi-DSPs parallel processing algorithm and implementation of the large-point FFT adopt the former part of the butterfly to be divided into several processors. Parallel processing, the final butterfly is all concentrated on one processor, the degree of parallelism is not high enough, no doubt a waste of resources

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