Dual-loop low dropout regulator
A technology of low-dropout linear and linear voltage regulators, which is applied in the direction of instruments, electrical variable adjustment, control/regulation systems, etc., can solve problems such as increasing chip area, ESR fluctuation, and increasing the peak of output transient response, so as to ensure the system Effect of stabilization, reduction of chip area and power consumption
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[0021] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.
[0022] Such as figure 1 As shown, the dual-loop LDO circuit of the present invention specifically includes: a first loop and a second loop. The first loop is a three-stage amplifier composed of the first amplification stage AMP1, the second amplification stage AMP2, the third amplification stage AMP3, the first compensation network CPNET1 and the second compensation network CPNET2, wherein AMP1, AMP2 and CPNET1 form an error Amplifier ERROR_AMP. The second loop is a three-stage amplifier composed of the second amplification stage AMP2, the fourth amplification stage AMP4, the fifth amplification stage AMP5 and the third compensation network CPNET3.
[0023] The specific connection relationship is: the positive input terminal of the first amplification stage AMP1 is connected to the external reference voltage source VREF as the input terminal ...
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