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High-precision operational amplifier adopting data sampling

An operational amplifier and data sampling technology, applied in the direction of DC-coupled DC amplifiers, differential amplifiers, etc., can solve problems such as capacitor discharge, large offset errors, and large leakage currents

Inactive Publication Date: 2012-12-19
苏州硅智源微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

N-channel transistors are usually fabricated on a P well formed on an N substrate, and the diode formed between the P well and the N substrate will have a large leakage current at high temperature, which will cause the capacitor to discharge
And this capacitor discharge can cause large offset errors

Method used

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  • High-precision operational amplifier adopting data sampling
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Examples

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Embodiment Construction

[0011] figure 1 It is a circuit schematic diagram of a traditional CMOS chopper zero-stabilized operational amplifier, such as Intel's ICL7650. The first CMOS transistor pair includes a P-channel transistor 10 and an N-channel load transistor 12 . The second CMOS transistor pair includes a P-channel transistor 14 and an N-channel load transistor 16 . A positive potential is applied to the sources of transistors 10 and 14 and a negative potential is applied to the sources of N-channel load transistors 12 and 16 . The positive input of the amplifier is applied to the gates of transistors 10 and 14 . The drain of transistor 12 is connected to the gates of transistors 12 and 16 and the output of the amplifier is connected to the drain of transistor 16 through transistor 18 .

[0012] During the return-to-zero portion of the chopper-zero amplifier cycle, the input is shorted and the input stage's feedback path 20 is closed, making its offset zero. Capacitor 22 stores zero volta...

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Abstract

The invention discloses a high-precision operational amplifier adopting data sampling. The offset can be zero by adjusting the transconductance between load transistors of a CMOS (Complementary Metal-Oxide-Semiconductor Transistor) pair. The offset is realized through two N channel transistors with relatively low transconductance, wherein each N channel transistor is respectively parallel to an N-channel load transistor in the CMOS pair. Offset voltage I is loaded to the grid electrode of one N channel transistor and the other voltage II is loaded to the grid electrode of the other N channel transistor. The voltage II is provided through input short circuit of the operational amplifier and closing of a feedback circuit in an input stage, so that the circuit offset is zero. The voltage loaded to the other N channel transistor is stored by a capacitor and is used in the subsequent sampling period.

Description

technical field [0001] The present invention relates to operational amplifiers, in particular to a high-precision operational amplifier that uses data sampling to compensate circuit offsets. Background technique [0002] An operational or differential amplifier provides an amplified output value based on the difference between two input signals. To ensure an accurate output signal, offsets in the circuit must be minimized or compensated for. Traditional bipolar op amps require matched components to ensure an accurate output signal, while traditional CMOS chopper-zero-stable op amps provide bias voltages to compensate for circuit offsets. When establishing the bias voltage, adopt the data sampling technique, short-circuit the two inputs periodically and close the amplifying loop to make the output zero. The bias voltage for the load transistor is stored by the capacitor and provided during the input sampling phase. The frequency when sampling is much higher than the freque...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03F3/45
Inventor 包兴坤
Owner 苏州硅智源微电子有限公司