Multi-core and multi-thread message order preservation method and system

Abstract

The invention discloses a multi-core and multi-thread message sequence preservation method and system, and relates to the technical field of network communication. S2: Each CPU obtains its own message, and processes the message after sorting the message through the corresponding thread; S3: After the current message is processed, it is judged whether the previous message has been forwarded, If so, forward the processed current message; otherwise, wait for the previous message to be forwarded before forwarding the processed current message. The present invention realizes the order preservation of the global message by judging whether the previous message has been forwarded, and prevents the disorder phenomenon that occurs when the message is sent.

Description

technical field [0001] The present invention relates to the technical field of network communication, in particular to a multi-core and multi-thread message order preservation method and system. Background technique [0002] In a program, these independently running program fragments are called "threads" (Thread), and the concept of programming using it is called "multithreading". A common example of multithreading is user interfaces. With threads, the user can press a button and the program responds immediately, rather than having the user wait for the program to complete its current task before responding. Most of the current high-end network devices use a multi-core CPU hardware architecture to improve message processing and forwarding performance, and create corresponding threads for the multi-core CPUs to perform one-to-one binding with the multi-core CPUs. [0003] The application number is: 201010289667.X, and the title of the invention is: A Chinese patent for a me...

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Problems solved by technology

[0003] The application number is: 201010289667.X, and the title of the invention is: A Chinese patent for a message forwarding method and system based on a multi-core architecture, which records a method that associates a hash queue (that is, the area divided by the hash table in the text) with threads The binding method realizes the lock-free design of shared resources, but when there are several packets of data streams on the network device, after hash calculation, they all fall into a hash queue, which will lead to the corresponding hash queue The thread of the thread is very busy, and the thread corresponding to other hash queues is in an idle state, so the usage efficiency of the multi-core CPU is low, resulting in a waste of resources

[0004] In order to improve the usage efficiency of the multi-core CPU in the network equipment, the RMI chip is used in the prior art to evenly distribute the received packets to each CPU. Since the packets are evenly distributed to each CPU, the packets have different sizes, so , the speed at which each CPU processes messages will be somewhat different. After the message processing is completed, there will be out-of-order phenomenon when the message is sent (there is a three-thousandth chance of out-of-order in the test), which is enough for general needs. , but for IPSEC packets and video packets, if out-of-order occurs, packet loss or video mosaic will occur, which will seriously hinder network communication

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