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High-density multiprocessor system and node controller

A multi-processor system, node controller technology, applied in architectures with multiple processing units, electrical digital data processing, instruments, etc., can solve problems such as not being able to meet all needs

Active Publication Date: 2011-08-31
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the existing node controller designs for Cluster nodes and MPP nodes cannot meet all requirements

Method used

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  • High-density multiprocessor system and node controller
  • High-density multiprocessor system and node controller
  • High-density multiprocessor system and node controller

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Embodiment Construction

[0088] In order to make the purpose, technical solution and advantages of the present invention clearer, a high-density multi-processor system and its node controller of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0089] A high-density multiprocessor system and its node controller of the present invention realize the high-speed interconnection of multiple processors, increase the density of the multiprocessor system, and realize the shared access of multiple processors to commercial peripherals .

[0090] The node controller of the present invention described in detail below in conjunction with the above-mentioned purpose, figure 1 is a schematic diagram of the internal structure of the node controller of the present invention, such as figur...

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Abstract

The invention discloses a high-density multiprocessor system and a node controller. The node controller comprises a primary processor port, secondary processor port, an I / O port, a reading / writing module, a direct memory and a reading / writing crossbar switch, wherein the primary processor port and the secondary processor port are connected with a primary processor and a secondary processor respectively, the primary processor is responsible for running concrete operation tasks and discovering and initiating peripheral equipment, and the secondary process is only responsible for running the concrete operation tasks; the I / O port is connected with the peripheral equipment through an I / O bus; the reading / writing module is connected with the reading / writing crossbar switch; the direct memory accesses the crossbar switch for realizing the direct memory access data exchange between the processor ports; and the reading / writing crossbar switch module is used for realizing the reading / writing data exchange between the processor ports and between the processor ports and the I / O port.

Description

technical field [0001] The invention relates to the field of parallel multiprocessor systems, in particular to a high-density multiprocessor system and its node controller. Background technique [0002] The node controller of the parallel multiprocessor system is the interconnection channel of various components (processor, main memory and equipment, etc.) in the node, and its structure varies with the architecture. The current mainstream architecture includes Symmetrical Multi-Processing (SMP), Non Uniform Memory Access (NUMA), Massively Parallel Processing (MPP) and Cluster System (Cluster ). [0003] The nodes in the Cluster use mainstream commercial computers, most of which are SMP and NUMA structures, so the node controllers used in SMP, NUMA and Cluster can be classified into one category, and the node controllers of such nodes use the North Bridge plus South Bridge. The north bridge is responsible for the data interaction between the processor, the main memory and t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/80G06F13/28
Inventor 曹政王凯陈飞刘锐胡涛安学军孙凝晖
Owner HUAWEI TECH CO LTD