Reconfigurable system supporting data prefetching and reuse

Abstract

The invention discloses a reconfigurable system supporting data prefetching and reuse, which comprises a reconfigurable array, a data prefetching and reusing module and a data stream control module. The data prefetching and reusing module can record a data stream access behavior. By adopting a dynamic self-inspired prefetching method and simultaneously combining a conventional data reusing method, the following two memory access management manners can be realized: the last two memory access addresses are compared, a prefetching address is dynamically calculated and the data prefetching operation is implemented in a gap of data transmission; and existing data and prefetched data are cached, the latest memory access data is judged whether to reuse a data space, and the cached data is directly fed back. The reconfigurable system can achieve high memory access efficiency and also can avoid complex hardware implementation and complex requirements for a compiler.

Description

technical field [0001] The invention belongs to the field of embedded reconfigurable technology, in particular to a reconfigurable system supporting data prefetch and reuse. Background technique [0002] Due to the high efficiency of hardware and the flexibility of software, the reconfigurable system is an ideal architecture choice for embedded media processing, wireless communication and other application fields. The reconfigurable array is the main computing component of the reconfigurable system. It has massive computing resources and sufficient routing resources. By properly configuring the functions and routing of its computing units, it can fully explore the data parallelism and instruction parallelism of the application. properties to improve performance. Compared with general-purpose processors, reconfigurable arrays have obvious advantages in processing computing-intensive applications. [0003] Computation-intensive applications such as media processing have a la...

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that the current compilation technology is difficult to effectively schedule this prefetch mechanism, so it often relies on the programmer to analyze the data flow characteristics of the algorithm, and the programmer explicitly specifies the data prefetch operation in the program , increasing the burden on programmers

[0008] Therefore, the current methods to improve the efficiency of on-chip memory access in reconfigurable systems have problems such as complex hardware implementation and insufficient compilation support.

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