Method for forming semiconductor device

Abstract

The invention provides a method for forming a semiconductor device, including providing a substrate, forming a gate dielectric layer, forming a gate electrode on the gate dielectric layer, forming a spacer on sidewalls of the gate dielectric layer and the gate electrode, and using a rapid thermal process (RTP) apparatus comprising a plurality of lamps and a bias applying system to dope the substrate to form a source / drain region, wherein in the RTP apparatus, gaseous dopant species are illuminated by the lamps to be excited for transference gaseous dopant species to dopant ions and the dopant ions are moved by a bias from the bias applying system to be doped into the substrate. The method can form very shallow source / drain regions fit for deep sub-micron semiconductor processes; and doping and annealing steps can be performed simultaneously in a rapid thermal process chamber, and minimal or no substrate lattice damage is generated.

Description

technical field [0001] The invention relates to a method for manufacturing an integrated circuit, in particular to a method for manufacturing an integrated circuit that is doped by a rapid thermal process (RTP for short). Background technique [0002] A Metal Oxide Field Effect Transistor (referred to as MOSFET) controls the surface channel between the source and drain below it. The channel, source and drain are set in the semiconductor substrate, where the source and drain are doped with the opposite doping of the substrate. sundries. A thin insulating layer such as gate oxide is separated between the gate and the substrate. The operation of the metal oxide field effect transistor includes inputting a voltage to the gate to generate a lateral electric field in the channel to control the vertical conduction of the channel. In the transistor, each source and drain form a junction with the substrate under the gate. For example, the substrate can be a p-type semiconductor mat...

AI Technical Summary

Problems solved by technology

The technology used to form junctions is mainly ion implantation. However, it is becoming more and more difficult for ion implantation processes to achieve shallow trench junctions below the 90nm generation.

In addition, the traditional ion implantation process can cause damage to the substrate, so a heat treatment process is required for repair

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