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Method for thinning back surface of wafer

A backside thinning and wafer technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of high cost, slow etching rate, etc., and achieve low cost, less particles, good economic benefits and performance Effect

Active Publication Date: 2013-05-01
WUHAN XINXIN SEMICON MFG CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Dry etching: the etching rate is slow, and the wafer is also required to be a silicon wafer on an insulating substrate, and the cost is high

Method used

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  • Method for thinning back surface of wafer
  • Method for thinning back surface of wafer

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Embodiment Construction

[0020] The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

[0021] Such as figure 1 and figure 2 As shown, the first step (indicated by 101) of the two-step wet etching method of the present invention is to wet-etch the silicon substrate 1 on the back of the wafer with a strong corrosive acid until the epitaxial layer 2 is exposed. The strong acid is hydrofluoric acid (HF ), a mixture of nitric acid (HNO3), phosphoric acid (H3PO4) and sulfuric acid (H2SO4), the wet etching rate of strong acid on the silicon substrate 1 on the back of the wafer is 8-12 microns / minute (um / min); the second step (marked by 102) uses selective acid to continue wet etching the silicon substrate and the exposed epitaxial layer 2 until the epitaxial layer 2 is completely exposed, and the selective...

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Abstract

The invention relates to a method for thinning the back surface of a wafer, in particular to a method for thinning the back surface of the wafer by two-step wet etching. The method specifically comprises the following steps of: 1, wet-etching a silicon substrate on the back surface of the wafer by using a strong acid, and stopping the etching once an epitaxial layer is exposed, wherein a mixture of a hydrofluoric acid, a nitric acid, a phosphoric acid and a sulfuric acid is adopted as the strong acid, and the silicon substrate can be wet-etched by the strong acid at speed of 8 to 12 microns per minute; and 2, continuing wet-etching the silicon substrate on the back surface of the wafer and the exposed epitaxial layer by using a selective acid until the epitaxial layer is completely exposed, wherein a mixture of a hydrofluoric acid, a nitric acid and an acetic acid is adopted as the selective acid, the silicon substrate can be wet-etched by the selective acid at speed of 8 to 12 microns per minute, and the exposed epitaxial layer can be wet-etched by the selective acid at speed of 0.04 to 0.06 micron per minute. An ultrathin and uniform wafer with a thickness of 2 microns and a thickness difference of less than 0.1 micron is prepared by the two-step wet etching method, is low in cost, and has high economic benefits and performance, an oxide layer is not required, the speed is higher, and the number of particles is small.

Description

technical field [0001] The invention relates to a wafer back thinning method, in particular to a two-step wet etching wafer back thinning method. Background technique [0002] The thinning technology of crystal back is widely used in smart cards and other aspects; the traditional thinning technology is difficult to meet the requirements of ultra-thin thickness, good flatness and precise thickness control. Traditional thinning techniques include the following: [0003] Mechanical grinding: It is difficult to achieve the effect of thinning to 20um, and there are scratches on the back surface of the wafer; [0004] Chemical mechanical polishing: The thinning rate is slow, and the wafer needs to be a silicon wafer on an insulating substrate. The silicon oxide layer on the insulating substrate is used as a stop layer, and the cost is high; [0005] Dry etching: The etching rate is slow, and the wafer is also required to be a silicon wafer on an insulating substrate, and the cos...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/306
Inventor 李平
Owner WUHAN XINXIN SEMICON MFG CO LTD