Backside illumination complementary metal-oxide-semiconductor (CMOS) image sensor and manufacturing method thereof
An image sensor, back-illuminated technology, applied in radiation control devices and other directions, can solve the problems of low reliability and yield of back-illuminated CMOS image sensors, film peeling, etc.
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Embodiment 1
[0035] Please refer to image 3 , which is a schematic diagram of the film stack of the back-illuminated CMOS image sensor according to Embodiment 1 of the present invention. Such as image 3 As shown, the back-illuminated CMOS image sensor 3 includes: a wafer 30; a vapor oxide layer 31 formed on the wafer; a thermal expansion buffer layer 32 formed on the vapor oxide layer; A high-K dielectric layer 33 on the buffer layer; wherein, the thermal expansion coefficient of the thermal expansion buffer layer 32 is between the thermal expansion coefficient of the wafer 30 and the thermal expansion coefficient of the high-K dielectric layer 33 .
[0036]Preferably, the thermal expansion coefficient of the thermal expansion buffer layer 32 is 2.5-5.8, further, the thermal expansion coefficient of the thermal expansion buffer layer 32 is 3.0-5.2, for example, the thermal expansion coefficient of the thermal expansion buffer layer 32 is 3.2, 3.4, 3.6 , 3.8, 4.0, 4.2, 4.4, 4.6, 4.8, or...
Embodiment 2
[0048] Please refer to Figure 4 , which is a schematic diagram of the film stack of the back-illuminated CMOS image sensor according to the second embodiment of the present invention. Such as Figure 4 As shown, the back-illuminated CMOS image sensor 4 includes: a wafer 40; a vapor oxide layer 41 formed on the wafer; a thermal expansion buffer layer 42 formed on the vapor oxide layer; The high-K dielectric layer 43 on the buffer layer; formed on the high-K dielectric layer; wherein, the thermal expansion coefficient of the thermal expansion buffer layer 42 is between the thermal expansion coefficient of the wafer 40 and the thermal expansion coefficient of the high-K dielectric layer 43 .
[0049] In this embodiment, the thermal expansion buffer layer 42 includes two thermal expansion buffer sublayers, specifically, a first thermal expansion buffer sublayer 420 and a second thermal expansion buffer sublayer 421, wherein the first layer thermal expansion The buffer sublayer ...
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