Array substrate, manufacturing method thereof, and display device

A technology of an array substrate and a manufacturing method, applied in the display field, can solve the problems of slow development of LTPSTFT technology, difficult competition of amorphous silicon TFT products, numerous production processes, etc., so as to reduce the number of patterning processes, shorten production time, and improve product quality. Effect

Active Publication Date: 2016-03-23
BOE TECH GRP CO LTD
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  • Description
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  • Application Information

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Problems solved by technology

[0018] The traditional technology of manufacturing low-temperature polysilicon thin film transistor (thinfilmtransistor, TFT for short) array substrate technology through 7 mask processes (7MaskLTPSTFT) is relatively complicated, and the manufacturing process is complicated, resulting in an increase in its manufacturing cost, which is difficult to compare with amorphous silicon TFT products. Competition slows LTPSTFT technology development

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  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device

Examples

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Embodiment 1

[0066] Combine below Figure 1 to Figure 9 , the method for manufacturing the array substrate in the embodiment of the present invention will be described in detail.

[0067] The manufacturing method of the array substrate in the embodiment of the present invention includes forming a thin film transistor and a pixel electrode pattern on the base substrate, the thin film transistor at least includes a gate electrode pattern, an active layer pattern, a source pattern and a drain pattern,

[0068] Wherein, the source pattern, the drain pattern, the pixel electrode pattern and the active layer pattern are formed in one patterning process through a three-gray-scale mask process.

[0069] The source pattern, the drain pattern, the pixel electrode pattern and the active layer pattern are formed in one patterning process through the three-gray-scale mask process, which can reduce the number of times the mask is used, simplify the production process, and greatly reduce the production c...

Embodiment 2

[0113] In this embodiment, an array substrate is provided, including a thin film transistor and a pixel electrode pattern formed on the base substrate, the thin film transistor at least includes a gate electrode pattern, an active layer pattern, a source pattern and a drain pattern, the The source pattern, the drain pattern, the pixel electrode pattern and the active layer pattern are formed by one patterning process.

[0114] Specifically, the array substrate includes:

[0115] Substrate substrate;

[0116] a pattern including a gate electrode on the base substrate;

[0117] a gate insulating layer pattern over the pattern including the gate electrode;

[0118] A pattern including an active layer located above the gate insulating layer pattern, the active layer pattern is formed by an active layer film formed above the gate insulating layer pattern, and the active layer pattern includes a source region, drain region and channel region;

[0119] A pattern including a pixel e...

Embodiment 3

[0148] This embodiment provides a display device, including the array substrate in Embodiment 2. Since the array substrate has the advantages of low cost and high quality, the cost of the display device can be reduced and the quality of the display device can be improved.

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Abstract

The invention belongs to the field of display technology, and discloses an array substrate and a manufacturing method thereof. The source pattern, drain pattern, pixel electrode pattern and active layer pattern of the array substrate are formed by a single patterning process. Compared with the traditional array substrate manufacturing process, the process is simple, the production time is shortened, and the product cost is reduced. , Improved product quality.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] Thin Film Transistor (ThinFilmTransistor, TFT) can be divided into polysilicon (Poly-Si, P-Si) TFT and amorphous silicon (a-Si) TFT, the difference between the two lies in the characteristics of the transistor. Due to the inherent defect problems of amorphous silicon a-Si, such as low on-state current, low mobility and poor stability caused by many defect states, it is limited in many fields. The molecular structure of P-Si is neatly and directionally arranged in a grain (Grain), so the electron mobility is 200-300 times faster than that of disordered amorphous silicon. P-Si products mainly include high-temperature polysilicon (HTPS) and low-temperature polysilicon (LowTemperaturePoly-Silicon, LTPS) two products. [0003] LTPS technology is a new generation of TFT di...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/77H01L27/12
CPCH01L27/124H01L27/1288H10K59/1201H01L29/6675H01L29/786
Inventor 马占洁
Owner BOE TECH GRP CO LTD
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