FPGA (field programmable gate array) architecture of HOG (histogram of oriented gradient) and SVM (support vector machine) based pedestrian detection system and implementing method of FPGA architecture

Abstract

The invention discloses an implementing method of FPGA (field programmable gate array) architecture of an HOG (histogram of oriented gradient) and SVM (support vector machine) based pedestrian detection system. The implementing method includes steps of inputting, gradient and direction computation, histogram generation, binaryzation, SVM classification and outputting. The invention further provides the FPGA (field programmable gate array) architecture of the HOG and SVM based pedestrian detection system. By the FPGA architecture and the implementing method thereof, the problem that an HOG and SVM based pedestrian detection algorithm is slow in computation on a PC(personal computer) is solved, transplant optimization of hardware is realized, the FPGA architecture of an embedded pedestrian detection system is implemented in the scheme with low power consumption, high detection efficiency and low resource consumption in real time, and thus, pedestrian detection is popularized and developed in the embedded field according to the scheme.

Description

technical field [0001] The present invention relates to the FPGA architecture of the pedestrian detection system based on HOG and SVM and its implementation method, and specifically relates to the optimization and improvement of the image-based pedestrian detection algorithm by applying HOG features and linear SVM classifiers, and its specific implementation on the FPGA. It belongs to the field of embedded pedestrian detection. Background technique [0002] Pedestrian detection is one of the hottest and most challenging research directions in the field of robot vision. It has a wide range of application prospects, such as security, transportation, entertainment, monitoring and robotics. Real-time performance, detection accuracy, hardware resource utilization and power consumption are the four most important performance indicators to achieve in an embedded environment. In recent years, with the wide application of FPGA technology in various fields, and its good performance,...

AI Technical Summary

Problems solved by technology

[0007] 1) The original algorithm is based on the realization of Haar eigenvalues ​​and SHIF eigenvalues. The classifier chooses Adaboost, SVM, etc., but the effect is generally not good, and the accuracy cannot meet the requirements

[0008] 2) Since 2005, authoritative pedestrian detection algorithms generally use HOG eigenvalues, and classifiers include SVM and Adaboost, etc., but the algorithm complexity is high. Although it has excellent detection accuracy, the detection speed is generally poor. Generally, it takes 3 to 4 seconds for a 320×240 pixel image on a PC, which does not meet the real-time requirements at all.

[0009] 3) In the HOG+SVM / Adaboost algorithm, because it contains too many squares, openness, inverse trigonometric functions, and division operations, it needs to be simplified or replaced to be implemented on hardware, especially embedded devices. Because of its calculation Very dense, generally in order to achieve the real-time performance of the algorithm, it often needs to sacrifice power consumption and detection accuracy, and requires more hardware resources

These implementations are difficult to implement in a low-end embedded FPGA chip

Oversimplification of the algorithm has caused other performance reductions, and both require additional memory to store intermediate data

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