Structure and Fabrication Method of High Voltage Junction Field Effect Transistor
A field effect transistor and junction technology, which is applied to the structure of high-voltage junction field effect transistors and the field of preparation thereof, can solve the problems of high impurity concentration and high device pinch-off voltage, and achieves lower impurity concentration, lower pinch-off voltage, and easy depleted effect
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[0024] In order to have a more specific understanding of the technical content, characteristics and efficacy of the present invention, now taking the HV JFET of N-type channel as an example, combined with the illustrated embodiment, the technical solution of the present invention is described in detail as follows:
[0025] The structure of the HV NJFET of this embodiment is as Figures 4 to 6 As shown, in addition to injecting Ptop into the DNW of the drain drift region, Ptop is also injected into the DNW of the body region. The specific preparation process of the HV NJFET device with this structure is as follows:
[0026] Step 1, on a low-doped P-type substrate (PSUB), use a photolithography process and an ion implantation process to form the DNW of the drain end drift region and the JFET body region.
[0027] In step 2, PW is formed on a low-doped P-type substrate by using a photolithography process and an ion implantation process. The PW can surround the DNW of the JFET b...
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