Method for identifying short-circuit path in integrated circuit layout verification process

Abstract

The invention discloses a method for identifying a short-circuit path in an integrated circuit layout verification process, belongs to the technical field of integrated circuit computer aided design, and particularly relates to the field of integrated circuit layout design rule checking (DRC) and layout versus schematic (LVS). The invention aims at providing a method for quickly searching the short-circuit path in a layout database. The problem of searching the short-circuit path in the layout database is transformed into the problem of the shortest path between appointed top points in an undirected graph through abstract expression, and the solution space is divided into a plurality of subspaces independent of each other according to the connectivity characteristic of the undirected graph, so that the algorithm complexity of problem solving is lowered; and meanwhile, the multi-point breadth-first shortest path search algorithm is adopted according to the characteristics of large data volume and complex connection relation in integrated circuit design, so that the required storage space is smaller and the running efficiency is higher relative to the general search algorithm.

Description

technical field [0001] The invention relates to a method for identifying short-circuit paths in integrated circuit layout verification, and belongs to the technical field of computer-aided design of integrated circuits, especially involving design rule checking (DRC) of integrated circuit layouts and consistency between layouts and schematic diagrams Sex Check (LVS) field. Background technique [0002] With the continuous shrinking of the device feature size of integrated circuits, the continuous improvement of integration, and the increasingly complex structure and process, the scale of the layout database is also increasing. At present, the size of the layout database in the common GDSII format is on the order of GB, and some large designs even reach TB. order of magnitude. With the expansion of chip scale, the design rules that need to be verified in each stage of integrated circuit design are also increasing. Among them, the design rule check (DRC) of the integrated ci...

AI Technical Summary

Problems solved by technology

Entering the era of deep sub-micron, with the increase of design scale, the scale of layout data expands rapidly, which will inevitably lead to more and more graphics of the same potential, more and more complex connection relationships, and the short circuit problem is not limited to a single unit Instead, it needs to be considered across levels. Finding short-circuit paths is more difficult than before, and the time spent is also multiplied.

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