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High-concurrency access and storage accelerating method and accelerator based on on-chip RAM, and CPU

An accelerator and memory access technology, applied in the computer field, can solve the problems of accelerating high concurrent memory access, limited number of concurrent memory accesses, etc., achieving the effects of easy management, reducing the number of queries, and improving search efficiency

Active Publication Date: 2013-10-09
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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Problems solved by technology

[0014] In order to solve the above-mentioned technical problems, the object of the present invention is to propose a high concurrent memory access accelerator based on on-chip RAM and a method for managing a large number of concurrent memory access requests by using on-chip RAM, so as to solve the problem of concurrent memory access of general processors in Internet and cloud computing applications. Accelerate high concurrent memory access for problems with limited numbers

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  • High-concurrency access and storage accelerating method and accelerator based on on-chip RAM, and CPU
  • High-concurrency access and storage accelerating method and accelerator based on on-chip RAM, and CPU
  • High-concurrency access and storage accelerating method and accelerator based on on-chip RAM, and CPU

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Embodiment Construction

[0067] The invention proposes the concept of "memory access accelerator" aiming at the problem that the number of concurrent memory access requests of general processors is limited. The memory access accelerator is another path between the CPU and the memory.

[0068] image 3 Shown is the location map of the memory access accelerator of the present invention on the processor, it bypasses the cache cache and MSHR, and the number of outstanding read requests it supports is at least an order of magnitude larger than that of MSHR. Therefore, through the memory access accelerator, the application can send more memory access requests to the memory system, thereby improving the concurrency of memory access. The processor includes CPU1, RAM3, memory access accelerator 4, Cache2, MSHR3, memory controller 6, and memory 7.

[0069] The memory access accelerator requires the CPU to have an on-chip addressable RAM space. The CPU writes the memory access request into the RAM space, and t...

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Abstract

The invention discloses a high-concurrency access and storage accelerator and accelerating method based on an on-chip RAM, and a processor adopting the method. The access and storage accelerator is independent of an on-chip Cache and an MSHR and connected with the on-chip RAM and an internal storage controller, and an uncompleted access and storage request is sent to the internal storage controller and an internal storage system through the access and storage accelerator. Therefore, the problem that a universal processor is limited in concurrency access and storage number in Internet and cloud computing application is solved, and high-concurrency access and storage is accelerated.

Description

technical field [0001] The invention belongs to the field of computers and relates to the internal structure design of a CPU, in particular to an on-chip RAM-based high-concurrency memory access acceleration method, an accelerator and a CPU. Background technique [0002] With the development of the Internet and cloud computing, there are more and more high-concurrency data processing programs. Such programs usually need to process a large number of concurrent loads submitted in the form of requests (requests) or jobs (jobs). The core business of these concurrent loads usually involves the processing and analysis of massive data. Such programs usually use multi-threads or multi-processes, with low or no memory access dependencies between threads or processes. [0003] Therefore, such applications can issue a large number of concurrent memory access requests to the memory system. This poses a challenge to the concurrency of the memory access system. If the concurrency of th...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F12/08G06F12/0884
Inventor 刘垚陈明扬陈明宇阮元
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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