Power sequence control circuit and integrated circuit

A timing control circuit and power supply technology, which is applied in the field of communication, can solve the problems of large space occupation and high circuit cost, and achieve the effects of low cost, elimination of reverse feeding voltage, and simple circuit form

Active Publication Date: 2017-04-12
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The present invention provides a power sequence control circuit and an integrated circuit to at least solve the problems of high cost and large space occupation of circuits for chip power sequence control in the related art

Method used

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  • Power sequence control circuit and integrated circuit
  • Power sequence control circuit and integrated circuit
  • Power sequence control circuit and integrated circuit

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Embodiment Construction

[0028] It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and examples.

[0029] An embodiment of the present invention provides a power sequence control circuit, figure 1 It is a schematic structural diagram of a power sequence control circuit according to an embodiment of the present invention Figure 1 ,like figure 1 shown, including:

[0030] A power supply output loop composed of the input terminal VCC2 of the power supply in the later sequence, the PMOS transistor VT2 and the output terminal VCC2-1 of the power supply in the later sequence in series, wherein the input terminal VCC2 of the power supply in the later sequence is connected to the source of the PMOS transistor, and The output terminal VCC2-1 of the post-sequence power supply is connected to the d...

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PUM

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Abstract

The invention discloses a power sequence control circuit and an integrated circuit. The power sequence control circuit comprises a power output loop which consists of an input terminal (VCC2) of a post-sequence power supply, a PMOS transistor (VT2), and an output terminal (VCC2-1) of the post-sequence power supply, wherein the post-sequence power supply, the PMOS transistor (VT2) and the output terminal (VCC2-1) of the post-sequence power supply are connected in series. The power sequence control circuit also comprises a power sequence control loop which consists of the input terminal (VCC2) of the post-sequence power supply, a first capacitor (C2), a first resistor (R3), the collector electrode of a first NPN triode (VT1), and the emitter electrode of the first NPN triode (VT1), wherein the input terminal (VCC2) of the post-sequence power supply, the first capacitor (C2), the first resistor (R3), the collector electrode of the first NPN triode (VT1) and the emitter electrode of the first NPN triode (VT1) are connected in series. The base electrode of the first NPN triode (VT1) is connected to the input terminal (VCC1) of a pro-sequence power supply and the gate electrode of the PMOS transistor (VT2) is connected between the first capacitor (C2) and the first resistor (R3). The invention achieves the power sequence control by utilizing a simple discrete device, and the circuits provided by the invention have simple structures and can avoid voltage flowing backwards. Moreover, the cost of the circuits is low.

Description

technical field [0001] The present invention relates to the communication field, in particular, to a power sequence control circuit and an integrated circuit. Background technique [0002] With the development of semiconductor technology, complex integrated circuits or systems such as large-scale switching chips, central processing unit (Central Processing Unit, CPU) chips, etc., have put forward high requirements on power supply timing and monitoring of power supplies. In a system composed of CPU, Digital Signal Processor (DSP for short), Field Programmable Gate Array (Field Programmable Gate Array, FPGA for short) and Application Specific Integrated Circuit (ASIC for short), etc. In a typical system, multiple supply voltages are required to optimize performance while reducing power consumption. However, the user must apply these supply voltages to the device and power it up and down in a predetermined sequence to prevent damage to the device. To realize the above-mention...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05B19/042
Inventor 易旭东谭建吴元锋
Owner ZTE CORP
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