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Field programmable gate array and soft-core processor core-based multi-UART (universal asynchronous receiver transmitter) interface extension system

A general-purpose asynchronous transceiver and soft-core processor technology, applied in the field of electronic information, can solve problems such as unsatisfactory and limited system performance expansion, and achieve the effect of reducing development cycle and cost and improving integration

Inactive Publication Date: 2013-12-25
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Summary
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Problems solved by technology

However, the existing processors only provide a limited number of UART interfaces, which cannot meet the requirements of a large number of serial interface devices, thus greatly limiting the performance expansion of the system

Method used

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  • Field programmable gate array and soft-core processor core-based multi-UART (universal asynchronous receiver transmitter) interface extension system

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Embodiment 1

[0025] Accompanying drawing is a kind of Nios II system architecture diagram of the multi-UART interface expansion method based on FPGA Nios II core of the present invention, comprising: Nios II soft-core processor, SDRAM controller core, EPCS controller core, JTAG core, 8 UARTs Core, Avalon internal switching bus.

[0026] as attached figure 1 , a multi-universal asynchronous transceiver interface expansion system based on a field programmable gate array and a soft-core processor core in this embodiment includes:

[0027] Nios II soft-core processor, as the core control unit of the entire field programmable gate array;

[0028] SDRAM controller core, realize the interface of external SDRAM chip;

[0029] The serial memory controller core realizes the interface of field programmable gate array configuration chip;

[0030] Support the kernel of JTAG protocol to realize the debugging of JTGA interface of field programmable gate array;

[0031] UART core, implementing UART in...

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Abstract

The invention mainly provides an interface extension system, and relates to the field of electronic information, in particular to a field programmable gate array and soft-core processor core-based multi-UART (universal asynchronous receiver transmitter) interface extension system. A NiosII soft-core processor is adopted as a control core of the whole field programmable gate array, and 8 paths of UART interfaces are implemented by controlling 8 paths of UART controller cores. Therefore, the requirements of a great number of pieces of serial interface equipment can be met.

Description

technical field [0001] The invention relates to the field of electronic information, and mainly provides an interface expansion system, in particular to a multi-purpose asynchronous transceiver interface expansion system based on a field programmable gate array and a soft-core processor core. Background technique [0002] Embedded systems are becoming more and more common. Processors based on 51, ARM, and DSP are still the mainstream in the low-end market. The multi-purpose asynchronous transceiver (UART) interface has the advantages of simple operation, reliable operation, strong anti-interference ability, and long transmission distance. Remote features, widely used in device communication. In embedded systems, sometimes printers, GPS, GPRS, cameras, etc. need to be connected to the UART interface at the same time. However, the existing processors only provide a limited number of UART interfaces, which cannot meet the requirements of a large number of serial interface devi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/24
Inventor 苏振宇于飞赵邦宇李前
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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