Manufacturing method of nmos metal gate electrode

Abstract

The invention discloses a method for manufacturing an NMOS metal gate electrode. The method comprises the following steps: forming a gate structure on the surface of a semiconductor substrate, wherein the gate structure includes a high-dielectric-constant gate oxidation layer and side wall layers, the high-dielectric-constant gate oxidation layer is located below a polycrystalline silicon alternate gate and contacts the semiconductor substrate, and the side wall layers are located at the two sides of the polycrystalline silicon alternate gate; performing N-type doping on the semiconductor substrate at the two sides of the gate structure to form a source region and a drain region; depositing an interlayer dielectric layer which covers the surface of the semiconductor substrate and the gate structure, and carrying out chemical mechanical polishing on the interlayer dielectric layer until the polycrystalline silicon alternate gate is exposed; removing a predetermined part of the polycrystalline silicon alternate gate, epitaxially forming a silicon germanium layer with compressive stress on the surface of the remaining polycrystalline silicon alternate gate and transferring transverse tensile stress to a channel region between the source region and the drain region; and removing the remaining polycrystalline silicon alternate gate and the epitaxially-formed silicon germanium layer with compressive stress and depositing and forming a metal gate electrode at the position of the polycrystalline silicon alternate gate. Therefore, stress can be applied to a channel accurately.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing an NMOS metal gate electrode. Background technique [0002] Currently, in the manufacture of semiconductor devices, silicon nitride can be used to induce stress in the transistor channel, thereby adjusting the carrier mobility in the channel. For NMOS devices, a silicon nitride layer with tensile stress needs to be deposited on the NMOS structure. [0003] The manufacturing method of the NMOS metal gate electrode in the prior art, combined with its specific cross-sectional structure schematic diagram, Figure 1a to Figure 1e Be explained. [0004] see Figure 1a , forming a gate structure on the surface of the semiconductor substrate 100, the gate structure includes a high dielectric constant gate oxide layer 102 located under the polysilicon replacement gate 101 and in contact with the semiconductor substrate and sidewalls located...

AI Technical Summary

Problems solved by technology

[0015] In the prior art, the carrier mobility in the NMOS channel is adjusted by applying tensile stress to the source and drain regions through a silicon nitride layer with tensile stress, and then indirectly applying lateral tensile stress to the channel. Therefore, the effect of applying stress is relatively poor, and it is impossible to accurately meet the stress requirements of the device channel.

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