Array substrate and manufacturing method thereof and liquid crystal display device
An array substrate and substrate technology, applied in transistor, semiconductor/solid-state device manufacturing, optics, etc., can solve the problems of complex manufacturing process, low transmittance, poor driving effect, etc., and achieve simple manufacturing process and high transmittance. , the driving effect is good
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Embodiment 1
[0070] This embodiment provides a method for preparing an array substrate, which includes:
[0071] Step 1: Form a pattern including a gate line, a gate, a gate insulating layer, a semiconductor layer, and a first transparent electrode on the substrate through a patterning process using stepwise exposure; wherein, the gate insulating layer does not exceed the gate and the gate line ;
[0072] Step 2: forming a passivation layer on the substrate after the aforementioned steps, and forming source vias and drain vias connected to the semiconductor layer in the passivation layer;
[0073] Step 3: Form a pattern including a source electrode and a drain electrode through a patterning process on the substrate that has completed the preceding steps, and form a pattern including a second transparent electrode through a patterning process; wherein, the source electrode and the drain electrode are respectively passed through the source electrode The hole and the drain via are electrical...
Embodiment 2
[0078] This embodiment provides a method for preparing an array substrate, such as Figure 2 to Figure 17 As shown, it includes the following steps:
[0079] S101 , forming a transparent conductive material layer 1 , an insulating material layer 3 , and a semiconductor material layer 4 in sequence, and coating a photoresist layer 8 on the semiconductor material layer 4 .
[0080] Preferably, a gate metal layer 2 may also be formed between the transparent conductive material layer 1 and the insulating material layer 3 .
[0081] Wherein, the transparent conductive material layer 1 is formed of a transparent and conductive material, such as indium tin oxide (ITO), which is used to form the first transparent electrode 11 , the gate 21 and the gate line 22 .
[0082] The gate metal layer 2 is usually made of molybdenum, aluminum and other metals or alloys, and is mainly used to form the gate 21 and the gate line 22 together with the transparent conductive material layer 1, so as ...
Embodiment 3
[0121] Such as Figure 18 As shown, this embodiment provides a method for preparing an array substrate, the first 8 steps (S201-S208) are the same as the first 8 steps (S101-S108) of Embodiment 2, the difference is that this embodiment starts from the ninth step for:
[0122] S209 , forming a passivation layer 5 (PVX), and forming a source via hole and a drain via hole connected to the semiconductor layer 41 and a second via hole connected to the first transparent electrode 11 in the passivation layer 5 .
[0123] S210, forming a source electrode 71 and a drain electrode 72 on the passivation layer 5 through a patterning process, and the source electrode 71 and the drain electrode 72 are respectively electrically connected to the semiconductor layer 41 through the source via hole and the drain electrode via hole, thereby forming a thin film transistor structure.
[0124] At the same time, the drain electrode 72 is also connected to the first transparent electrode 11 through ...
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