Positive definite matrix floating point inversion device based on FPGA and inversion method thereof

Abstract

The invention discloses a positive definite matrix floating point inversion device based on an FPGA and an inversion method thereof. The inversion device comprises a process control module, an operation module and a storage module. The process control module is respectively connected with the operation module and the storage module. The operation module is connected with the storage module. The process control module is used for generating a signal to control the orderly operation of the operation module and the storage module. The operation module is used for carrying out the matrix operation. The storage module is used for caching data of a matrix to be operated and data of a result matrix and providing a system bus access interface. The positive definite matrix floating point inversion device can be conveniently and rapidly achieved on a chip of the FPGA, and on the premise of guaranteeing the precision, the matrix inversion speed is improved.

Description

technical field [0001] The invention belongs to the field of high-performance computing, in particular to an FPGA-based positive definite matrix floating-point invertor and an inversion method thereof. Background technique [0002] Matrix operation is a basic operation in scientific computing, and it exists widely in the fields of industrial control, pattern recognition, digital signal processing, etc. Especially in the process of predictive control quadratic programming, positive definite matrix inversion becomes the most time-consuming in the calculation process. Critical operations that seriously affect the overall performance of the control. At present, most matrix inversions are realized by software, but as the dimension of the matrix increases, the speed of software processing will also slow down significantly. And because the calculation software cannot be embedded in the embedded electronic system with high real-time requirements, the defect that the inversion of th...

AI Technical Summary

Problems solved by technology

[0008] For overcoming above-mentioned deficiencies in the prior art, the present invention provides a kind of positive definite matrix floating-point invertor and inversion method used on the FPGA chip, under the situation that reduces hardware resource consumption as far as possible, adopts logic relatively simple algorithm and The parallel pipeline structure can greatly improve the calculation speed under the premise of ensuring the calculation accuracy

Images