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Transistor and method of forming the same

A technology of transistors and semiconductors, applied in the manufacture of transistors, semiconductor devices, semiconductor/solid-state devices, etc., can solve problems such as large leakage currents, achieve the effects of preventing leakage currents from increasing, reducing leakage currents, and weakening diffusion problems

Active Publication Date: 2018-05-01
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] However, the short channel effect of the transistor formed by the prior art is relatively obvious, and there is a large leakage current

Method used

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  • Transistor and method of forming the same
  • Transistor and method of forming the same
  • Transistor and method of forming the same

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Embodiment Construction

[0017] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0018] Secondly, the present invention is described in detail by means of schematic diagrams. When describing the embodiments of the present invention in detail, for convenience of explanation, the schematic diagrams are only examples, which should not limit the protection scope of the present invention.

[0019] In order to solve the problems of the prior art, the inventors of the present invention have analyzed and researched the transistors of the prior art, and found that the dopant ions in the stress layer of the source...

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Abstract

The invention provides a transistor and a forming method thereof. The forming method comprises the following steps that: a gate structure is formed at a semiconductor substrate; openings are formed in the semiconductor substrate at the source / drain zone position with the exposed gate structure; the bottoms and the side walls of the openings are covered with stress materials so as to form first stress layers doped with anti-diffusion materials; and the openings are continuously filled with the stress materials so as to form second stress layers doped with source / drain zone doping ions. A transistor includes a semiconductor substrate, a gate structure arranged on the semiconductor substrate, openings formed in the semiconductor substrate with the exposed gate structure, first stress layers covering the bottoms and the side walls of the openings, and second stress layers filled in the openings, wherein the first stress layers are doped with anti-diffusion materials and the second stress layers are doped with source / drain zone doping ions. According to the invention, the leakage current of the transistor is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a transistor and a forming method thereof. Background technique [0002] As the most basic semiconductor device, transistors are currently being widely used. With the increase of component density and integration of semiconductor devices, the gate size of transistors has become shorter than before; however, the shortened gate size of transistors will make transistors The short channel effect is generated, and then leakage current is generated, which finally affects the electrical performance of the semiconductor device. At present, in the prior art, the stress of the channel region of the transistor is mainly increased to increase the mobility of carriers, thereby increasing the driving current of the transistor and reducing the leakage current in the transistor. [0003] In the prior art, the method for increasing the stress of the channel region of the tran...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78H01L29/06
CPCH01L29/165H01L29/66568H01L29/66636H01L29/7848
Inventor 赵猛
Owner SEMICON MFG INT (SHANGHAI) CORP