Package Test Method

Abstract

The invention discloses a packaging and testing method, which includes the following steps. A semiconductor package unit is provided, which includes a package compound, a lead frame and a plurality of dicing lines. The dicing line defines a plurality of semiconductor package elements on the semiconductor package unit. Each semiconductor package element has a plurality of external connection terminals. The lead frame is cut along the dicing line to electrically insulate the semiconductor package components. The semiconductor packaging unit is placed on the carrier wafer. The probe card is brought close to the semiconductor package unit mounted on the carrier wafer, and the plurality of probe terminals of the probe card are respectively contacted with the external connection terminals, so as to test each semiconductor package element. Mark test results as abnormal semiconductor package components. Singulating the semiconductor package components and removing the semiconductor package components marked as abnormal.

Description

technical field [0001] The present invention relates to a testing method, and in particular to a packaging and testing method of a semiconductor element. Background technique [0002] In order to obtain information on the pros and cons of the process at any time during the manufacturing process of semiconductor package components, multiple test keys are specially designed on the semiconductor package components, and these test keys are then connected through test terminals and subjected to various tests , to monitor the pros and cons of each stage of the process. [0003] After the semiconductor element is covered with encapsulant and before electroplating, each chip on the lead frame is electrically short-circuited. Therefore, if you want to test with a semiconductor package unit that has not been singulated (Singulation), you must first complete its Electrical isolation between chips. [0004] Compared with the testing method of singulated wafers, the testing method of t...

AI Technical Summary

Problems solved by technology

Existing test systems are mostly suitable for package structures with leads, such as Small Outline Package and Quad Flat Package (QFP), etc., but for leadless package structures, such as: Small Outline No-Lead (SON) and Quad Flat No-lead (QFN), etc., have difficulties in the process of electrically isolating chips

In addition, in traditional package testing, the test system needs to prepare corresponding pick-up equipment and carrying fixtures for different package structure sizes, which requires additional processes or the purchase of expensive equipment and fixtures, which has a huge impact on production costs and time. kind of waste

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