A kind of semiconductor device and its manufacturing method

Abstract

The invention provides a semiconductor device and a manufacturing method of the semiconductor device, and relates to the technical field of semiconductors. According to the method for manufacturing the semiconductor device, in the manufacturing process of the CMOS device, a lifting drain electrode and a lifting drain electrode of a PMOS are formed in a PMOS region through an embedded germanium silicon process, a lifting drain electrode and a lifting drain electrode of an NMOS are formed in an NMOS region through an embedded SiC process at the same time, and therefore mobility of the NMOS is improved without affecting the stress of the PMOS, the requirement of the whole CMOS device for the stress is met, and performance of the semiconductor device is improved. Correspondingly, according to the semiconductor device, the lifting drain electrode and the lifting drain electrode of the PMOS are formed in the PMOS region through the embedded germanium silicon process, the lifting drain electrode and the lifting drain electrode of the NMOS are formed in the NMOS region through the embedded SiC process at the same time, and therefore the mobility of the NMOS is improved without affecting the stress of the PMOS, the requirement of the whole CMOS device for the stress is met, and the performance of the semiconductor device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the field of semiconductor technology, with the rapid development of nano-processing technology, the feature size of transistors has entered the nanoscale. The method of improving the performance of the current mainstream silicon CMOS devices by scaling down is subject to more and more physical and technological limitations. In order to improve the performance of NMOS and PMOS transistors in CMOS devices, stress engineering (stress engineering) has attracted more and more attention from the industry. [0003] Stress affects the mobility of carriers in semiconductors. In general, the mobility of electrons in silicon increases with increasing tensile stress along the direction of electron migration and decreases with increasing compressive stress. In contrast, the mobility of posit...

AI Technical Summary

Problems solved by technology

In CMOS devices, if the channel compressive stress is simply introduced by using epitaxial SiGe for PMOS, the carrier mobility of NMOS may not meet the performance requirements of the device.

However, if compressive stress is applied to PMOS by using epitaxial SiGe technology, and channel tensile stress is introduced by depositing SiN film to improve the carrier mobility of NMOS, the introduced SiN film is likely to affect the stress of PMOS. In turn, it affects the carrier mobility of PMOS; and, because the introduced SiN film finally exists only above NMOS, it will inevitably cause the device size of NMOS and PMOS to be inconsistent, resulting in differences in device performance between NMOS and PMOS, which in turn affects the entire CMOS The performance of semiconductor devices

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