A signal receiving equalization processing method

Abstract

The invention discloses a signal reception equalization processing method. The method is characterized by carrying out sample and hold on an input signal under a sampling clock to obtain four groups of signals: s[n-3],s[n-2], s[n-1] and s[n], wherein the s[n-3] and the s[n-2] are absolute values of a negative voltage to earth level of the input signal, the s[n-1] and the s[n] are absolute values of a positive voltage to earth level of the input signal; the earth potential is determined to be one point p in input signal normalization amplitude, with 0<=p<=1; and the sampling clock frequency is twice as large as the signal frequency; and carrying out equalization and insertion calculation on the four groups of signals simultaneously in the above process to obtain insertion data d[n]. The s[n] which is a current signal passes through four switch capacitor sets which are controlled by four sampling clocks: clk[n-1], clk[n-2], clk[n-3], clk[n-4], and sampling is carried out when the sampling clocks are in high level. The signal reception equalization processing method effectively reduces the precision requirement of a later-stage analog-to-digital conversion circuit and reduces the area and power consumption of the analog-to-digital conversion circuit.

Description

technical field [0001] The invention relates to the field of digital signal processing, in particular to an equalization method for a high-speed digital signal receiving end. Background technique [0002] In the application of digital communication, for the receiving end of the high-speed data transmission system, in order to compensate the signal attenuation caused by the transmission line, the input signal is generally equalized before subsequent signal processing. In the prior art, there is a large category of analog circuits to realize the FIR filtering function, which requires a larger volume of filtering components, so the scale is large and the power consumption of the circuit is large. As an improvement, another major processing method at present is to use an analog-to-digital conversion circuit, which first converts the input signal into a digital signal, and then realizes the equalization function through a digital filter circuit. However, the digital filter circu...

AI Technical Summary

Problems solved by technology

However, the digital filter circuit in this technology will increase the quantization noise, so a high-speed, high-precision analog-to-digital conversion circuit is required. However, improving the accuracy of the analog-to-digital conversion circuit in a 10Gbps level system will greatly increase the system area and system power consumption

At the same time, in order to achieve signal equalization and insertion through digital signal processing, this scheme will increase the circuit scale and power consumption of the digital signal processing part at the same time

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