Method for manufacturing thin film transistor and thin film transistor

Abstract

The invention discloses a method for manufacturing a thin film transistor and the thin film transistor. The method is used for achieving a thin film transistor which is high in yield. The method for manufacturing the thin film transistor comprises the step of forming a grid pattern and a grid insulating layer on a substrate and forming a source electrode pattern, a drain electrode pattern and an active layer pattern. The process of forming the source electrode pattern, the drain electrode pattern and the active layer pattern comprises the steps that a semiconductor layer and a conducting layer covering the whole substrate are formed on the substrate in sequence, first photoresist layers with the set thickness are formed in the area where a source electrode will be formed in the conducting layer and the area where a drain electrode will be formed in the conducting layer respectively, at least the gap between the area where the source electrode will be formed in the conducting layer and the area where the drain electrode will be formed in the conducting layer is provided with a second photoresist layer, the etching process is carried out on the parts, on which the first photoresist layers, the second photoresist layer, the semiconductor layer and the conducting layer are formed, on the substrate to form the active layer pattern, the source electrode pattern and the drain electrode pattern.

Description

Technical field [0001] The invention relates to the technical field of semiconductor device manufacturing, in particular to a method for manufacturing a thin film transistor and a thin film transistor. Background technique [0002] Thin Film Transistor (TFT) as a switching device plays an important role in the field of display technology. To produce low-cost and high-performance TFTs has always been a goal pursued by people. [0003] Generally, a thin film transistor includes at least a gate (Gate), a source and a drain (Source and Drain, referred to as source and drain SD), and a channel layer (Channel, also known as an active layer). In recent years, in order to simplify the process flow or reduce the number of masks used, the semiconductor layer for making the active layer pattern and the conductive layer for making the source and drain patterns are deposited first, and then the gray tone mask (gray tone mask, referred to as GTM) or half tone mask (half tone mask, referred to ...

AI Technical Summary

Problems solved by technology

[0009] In recent years, with the trend of decreasing pattern line width, the distance between the source and drain is getting smaller and smaller, generally on the order of a few microns, and the source and drain are easily short-circuited due to incomplete etching ( i.e. form GTBridge bad)

In addition, the active layer will also be damaged due to excessive etching, causing the active layer to be disconnected (that is, poor channel open is formed)

In the prior art, a photoresist layer with different thicknesses in different regions is formed through a gray-tone mask or a half-tone mask. Due to the limitation of glue coating uniformity and exposure uniformity, the incompletely exposed region (that is, the region corresponding to the channel) is correspondingly fabricated. The thickness uniformity of the photoresist layer is difficult to control accurately, some areas are thinner and some areas are thicker, and the subsequent etching is carried out according to the condition of equal thickness, which leads to incomplete etching of the photoresist in the thicker area , resulting in poor source-drain short circuit (GT Bridge), and excessive etching of the photoresist in the thinner area, resulting in poor channel open (channel open) when the TFT is energized

Seriously affect the working performance of TFT, or cause the defect of TFT, so that the yield rate of mass-produced TFT will drop

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