High-reliability NAND Flash reading method and system

A reliability and data acquisition technology, which is applied in the reading method and system field of high-reliability NAND Flash, can solve the problems of programming state and erasing state threshold window offset, reading error, difficult data, etc., to achieve The effect of reducing the probability of erroneous reading and improving accuracy

Active Publication Date: 2014-05-21
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As we all know, the threshold distribution of memory cells is inherently non-deterministic. After multiple programming and erasing operations, the distribution range of the threshold will further deviate from the ideal. The threshold voltage shift phenomenon caused by the interference effect of the component may have the problem of shifting the threshold window of the programming state and the erasing state, for example, the memory voltage distribution appears figure 2 (a) or figure 2 For the distribution shown in (b), there is even a problem that the threshold window of the programmed state and the erased state overlap, for example, the memory voltage distribution appears figure 2 The distribution shown in (c)
At this time, if the traditional one-time reading method is adopted, after multiple programming and erasing operations, the number of incorrectly read bits will gradually increase. When large-scale page reading is performed, it will be difficult to directly obtain the final correct value. data, resulting in read errors

Method used

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  • High-reliability NAND Flash reading method and system
  • High-reliability NAND Flash reading method and system
  • High-reliability NAND Flash reading method and system

Examples

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Embodiment 1

[0039] image 3 It is a flow chart of the reading method of the highly reliable NAND Flash described in this embodiment, as image 3 As shown, when the NAND Flash receives a read command, use the N flip point comparison voltages to read the storage state of each storage unit in the NAND Flash page respectively, and obtain N parts of the read results, wherein the storage state For erase state or program state. Taking N=3 as an example, the specific reading methods include:

[0040] S301. Read the page by comparing the voltage at the first inversion point, and save the reading result;

[0041] Nand Flash has a variety of structures. Taking SLC-type NAND Flash as an example, data is stored in the storage unit cell in the form of bits. In SLC-type NAND Flash, only one bit can be stored in a cell, and these cells are combined in units of 8 or 16 to form a so-called byte or word, which is the bit width of the NAND Device, and these byte / word will be recomposed Page. For example...

Embodiment 2

[0071]According to the same conception of the present invention, the present invention also provides a kind of reading system of highly reliable NAND Flash, in said system, in the peripheral circuit of said NAND Flash, be stored with N flip point comparison voltages, and said N The N+1 voltage intervals of the N+1 voltage intervals formed by the comparison voltages of the flipping points are arranged according to the size, and the storage states of each memory cell in the NAND Flash page are read using the N flipping point comparison voltages respectively, and N parts of reading results are obtained. Figure 4 It is a block diagram of the reading system of the highly reliable NAND Flash described in this embodiment, as Figure 4 As shown, the reading system of the highly reliable NAND Flash described in this embodiment includes:

[0072] Preliminary reading module, for when described NAND Flash receives read order, use N flipping point comparative voltage to read the storage s...

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Abstract

The invention relates to the technical field of data storage, and discloses a high-reliability NAND Flash reading method and system. The method comprises the following steps: storing N turnover point comparison voltages in a peripheral circuit, wherein the N turnover point comparison voltages are arranged to form N+1 voltage intervals by size, the number of statistic times of the voltage intervals are respectively stored in the peripheral circuit of the NAND Flash, and N is an odd number which is greater than 1; when receiving a reading command, acquiring N reading results by respectively using the storage states of the storage units in the N turnover point comparison voltage reading page; and sequentially determining the storage states and voltage intervals of the storage units, determining the reading result of the page, and adjusting the N turnover point comparison voltages. By adopting the multiple-reading mode, temporarily storing and comparing the reading results each time and combining ECC (error correction code) verification, the method and system can effectively reduce the probability of error reading in large-scale reading and enhance the accuracy of the reading operation.

Description

technical field [0001] The invention relates to the technical field of data storage, in particular to a method and system for reading high-reliability NAND Flash. Background technique [0002] Flash memory (flash memory, flash memory for short) is a new type of storage medium born in the late 1980s. Due to its excellent characteristics such as non-volatile, high speed, high shock resistance, low power consumption, small size and light weight, flash memory has been widely used in embedded systems and portable devices in the fields of mobile communication and data acquisition in recent years, such as mobile phones and portable media players. Devices, digital cameras, digital video cameras, sensors, and also used in aerospace and other fields, such as aerospace vehicles. [0003] NAND Flash is a non-volatile semiconductor flash memory that can be electrically erased and written online. It has the advantages of fast erasing and writing speed, low power consumption, large capaci...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/26G11C16/06G11C29/42
Inventor 朱一明苏志强丁冲张君宇
Owner GIGADEVICE SEMICON (BEIJING) INC
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