Unlock instant, AI-driven research and patent intelligence for your innovation.

A method for testing the junction temperature of vdmos devices

A test method and device technology, which is applied to thermometers, instruments, thermometers, etc. that are directly sensitive to heat-sensitive electrical/magnetic components, and can solve problems such as the influence of device junction temperature test accuracy, inaccurate junction temperature measurement, and device temperature changes. , to achieve the effect of improving the measurement accuracy of the junction temperature, simplifying the equipment, and eliminating the error of the junction temperature measurement

Inactive Publication Date: 2016-08-24
BEIJING UNIV OF TECH
View PDF4 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the time delay during the switching process of the operating current and the test current, it may cause a large change in the device temperature and cause inaccurate junction temperature measurement
Experiments have shown that a time delay of 1us can cause a temperature change of more than 200°C
Moreover, the delay time of the current equipment can generally reach 1 ~ 5us
The time delay generated during the switching process of the working current and the test current has a great influence on the accuracy of the device junction temperature test

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A method for testing the junction temperature of vdmos devices
  • A method for testing the junction temperature of vdmos devices
  • A method for testing the junction temperature of vdmos devices

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0026] The present invention will be described in more detail below in conjunction with the accompanying drawings and specific embodiments.

[0027] The testing device involved in the present invention is as figure 1 shown. Including VDMOS device 1, thermostat 2, tracer 3 and device fixture 4. The VDMOS device 1 to be tested is a MOS tube, and the packaging form is TO-247, its maximum working voltage is 200V, and its maximum working current is 50A. The tracer 3 adopts the Agilent 371A high-power curve tracing instrument. Thermostat 2 uses Despatch900series.

[0028] The flowchart of the method involved in the present invention is as figure 2 shown, including the following steps:

[0029] Step 1, connect the device 1 to the device fixture 4 of the graph instrument 3 through wires, put the device 1 into the incubator, and use the incubator 2 to heat the device 1; the heating temperature starts from 30°C and increases by 10°C each time , that is, the test temperature is 30...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a method for testing junction temperature of a VDMOS (Vertical Double Diffusion Metal Oxide Semiconductor) device. The device comprises VDMOS device 1, a temperature box 2, a graphic instrument 3 and a device clamp 4. The method comprises the following steps: measuring on-state resistance of the device under different temperatures to obtain a temperature-on-state resistance relation curve; then, enabling the device to enter in a working state, measuring an output characteristic curve of the device and calculating the on-state resistance according to the output characteristic curve; finally, obtaining junction temperature corresponding to the on-state resistance according to the temperature-on-state resistance relation curve. A non-switch device junction temperature measuring method is used, so that the junction temperature measurement error caused by switch switching delay is eliminated; narrow-pulse high current is applied to a tested device by using the graphic instrument, so that the influence of self heating of the device on the junction temperature can be avoided; the damage to the device is avoided; the safety of the device is ensured and the junction temperature measurement precision is improved simultaneously.

Description

technical field [0001] The invention belongs to the field of electronic device testing, and is mainly applied to the measurement and analysis of the junction temperature of the device, in particular to a method for testing the junction temperature of a VDMOS (vertical double-diffusion metal-oxide-semiconductor, vertical double-diffusion metal-oxide-semiconductor). Background technique [0002] With the development of semiconductor devices in the direction of small size and high integration, especially the continuous increase of operating power leads to the continuous increase of heat generated by the device during operation, which increases the junction temperature, resulting in a decrease in device reliability and shortened life. In order to accurately evaluate its reliability, it is particularly important to test the junction temperature of the device. [0003] At present, the junction temperature test of VDMOS devices mostly adopts the electrical method. The relevant stan...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G01K7/16
Inventor 郭春生王琳冯士维李睿张燕峰李世伟
Owner BEIJING UNIV OF TECH
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com