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Pseudomorphic high electron mobility transistors including doped low temperature buffer layers

A high electron mobility, buffer layer technology, applied in circuits, electrical components, semiconductor devices, etc., can solve problems such as complex impact on overall device performance, gate hysteresis and kink, drain hysteresis, etc.

Active Publication Date: 2017-07-07
AVAGO TECH INT SALES PTE LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Slow change in trap occupancy when changing bias can lead to performance defects such as drain hysteresis, gate hysteresis, and kink
These defects tend to reduce the linearity and efficiency of device performance and other
Additionally, it can prevent the effective use of power management schemes such as envelope tracking, which might otherwise be used to improve efficiency and linearity in amplifier applications
Furthermore, the severity of these performance deficiencies can vary with temperature, which can further complicate their impact on overall device performance

Method used

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  • Pseudomorphic high electron mobility transistors including doped low temperature buffer layers
  • Pseudomorphic high electron mobility transistors including doped low temperature buffer layers
  • Pseudomorphic high electron mobility transistors including doped low temperature buffer layers

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Embodiment Construction

[0023] In the following detailed description, for purposes of explanation and not limitation, representative embodiments disclosing specific details are set forth in order to provide a thorough understanding of the teachings of the present invention. However, persons of ordinary skill in the art having the benefit of this disclosure will appreciate that other embodiments in accordance with the teachings of the present invention that depart from the specific details disclosed herein remain within the scope of the appended claims. Moreover, descriptions of well-known apparatus and methods may be omitted so as not to obscure the description of the example embodiments. Such methods and apparatus are clearly within the scope of the teachings of the present invention.

[0024] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. The defined terms are in addition to the technical, scientific or ordinary meanings...

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Abstract

The present application relates to a pseudomorphic high electron mobility transistor comprising a doped low temperature buffer layer. A pseudomorphic high electron mobility transistor PHEMT comprises: a substrate comprising a III-V semiconductor material; a buffer layer disposed above the substrate, wherein the buffer layer comprises microprecipitates of V-group semiconductor elements and doped with N-type dopants; and a channel layer disposed above the buffer layer.

Description

technical field [0001] The present invention relates to transistors, and more particularly to pseudomorphic high electron mobility transistors (PHEMTs). Background technique [0002] Pseudomorphic high electron mobility transistors (PHEMTs) are widely used in switching, power and low noise amplifier applications in wireless communication systems. One reason for this widespread use is that PHEMTs are generally considered to have a suitable combination of noise, power, and high frequency performance for many applications. [0003] A typical PHEMT includes multiple epitaxial layers grown on a gallium arsenide (GaAs) substrate. Such layers may in order comprise a GaAs buffer layer, a superlattice buffer layer, optionally a pulsed doped layer under the channel, a GaAs or aluminum gallium arsenide (AlGaAs) spacer, a trench comprising indium gallium arsenide (InGaAs) A channel layer, a top AlGaAs or GaAs spacer layer with inserted n-type pulse or bulk doped layers, an undoped GaA...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/778H01L29/06
CPCH01L29/66462H01L29/7785H01L21/02395H01L21/02463H01L21/02546H01L21/20H01L29/778
Inventor 乔纳森·阿布罗克华内森·珀金斯约翰·斯坦贝克菲尔伯特·马什汉斯·G·罗丁
Owner AVAGO TECH INT SALES PTE LTD