ccd test device

Abstract

A CCD detecting device is characterized in that a pulse time sequence signal generating module, a CCD vertical time sequence driving circuit, a high-level direct-current source and a low-level direct-current source are included, the pulse time sequence signal generating module at least comprises a terminal device for man-machine interaction and a processing chip, operators input various preset control parameters into the processing chip through the terminal device, the processing chip generates corresponding pulse time sequence signals according to different control parameters, under the control effect of the pulse time sequence signals, the CCD vertical time sequence driving circuit can carry out time-sharing gating processing on the high-level direct-current source and the low-level direct-current source, and accordingly CCD driving signals corresponding to the pulse time sequence signals are obtained. The CCD detecting device has the advantages that one detecting circuit set can meet the detecting requirements of different types of CCDs, hardware consumption during a detecting process is lowered, trivial work that in the prior art, driving circuits need to be independently designed for different types of CCDs is avoided, and detecting working efficiency is indirectly improved.

Description

technical field [0001] The invention relates to a device for CCD testing, in particular to a CCD testing device. Background technique [0002] In the prior art, when the CCD is tested, the conventional design idea is: for each kind of CCD, a set of driving timing and driving circuit are separately designed, and a typical CCD vertical timing driving circuit is such as the vertical driving circuit introduced by Kadak Company (KODAKKAI -0340CCDIMAGESENSORIMAGEREVALUATIONBOARDUSERSMANUAL, REVISION1.0APRIL19, 2004), this circuit is aimed at the working characteristics of the clock phase Φvi pulse in the imaging area of ​​CCD devices with different structures required to be in "H" or "L" for a long time, and the vertical drive circuit is also designed to be "H" accordingly There are two circuit structures of clamping or "L" clamping, but there are differences in the structure of the two circuits of "H" clamping and "L" clamping, so that the finished vertical drive circuit can only...

AI Technical Summary

Problems solved by technology

[0002] In the prior art, when the CCD is tested, the conventional design idea is: for each kind of CCD, a set of driving timing and driving circuit are separately designed, and a typical CCD vertical timing driving circuit is such as the vertical driving circuit introduced by Kadak Company (KODAKKAI -0340CCDIMAGESENSORIMAGEREVALUATIONBOARDUSERSMANUAL, REVISION1.0APRIL19, 2004), this circuit is aimed at the working characteristics of the clock phase Φvi pulse in the imaging area of ​​CCD devices with different structures required to be in "H" or "L" for a long time, and the vertical drive circuit is also designed to be "H" accordingly There are two circuit structures of clamping or "L" clamping, but there are differences in the structure of the two circuits of "H" clamping and "L" clamping, so that the finished vertical drive circuit can only be adapted to a specific type. CCD drive needs, but can not be used for other purposes, this kind of vertical drive circuit is not universal, so in production, it is necessary to redesign the drive circuit separately for different types of CCD, the workload and hardware consumption are large, and it is very cumbersome, high production cost

[0003] The inventor had previously proposed a patent application (hereinafter referred to as the reference) entitled "CCD driving timing generation method and its driving timing generating device" (application number: CN201310353387). The core of this technology is: based on the same hardware device, Different timing pulses can be obtained by changing the control parameters, thereby generating corresponding CCD drive signals. The hardware involved includes the control parameter adjustment device (that is, the terminal equipment in the reference), the timing pulse generation device (that is, the reference in the reference Processing chip) and CCD drive signal generation device (that is, CCD vertical timing drive circuit); the aforementioned invention patent application proposes a brand-new design idea for the CCD test device, but does not propose a specific implementation method for the specific CCD vertical timing drive circuit

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