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Dynamic load balancing method for CPU+GPU CPPC

A dynamic load, parallel computing technology, applied in the direction of resource allocation, multi-program device, etc., to achieve the effect of improving the adaptability of the platform

Inactive Publication Date: 2014-07-02
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Abstract
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  • Claims
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Problems solved by technology

[0004] Aiming at the important and difficult point of how to realize the load balancing of CPU and GPU computing equipment collaborative computing, the present invention proposes a dynamic load balancing scheme and software implementation method of CPU+GPU collaborative parallel computing, which is effective in occasions where traditional dynamic load balancing methods are difficult to play a role solved the problem

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  • Dynamic load balancing method for CPU+GPU CPPC

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Embodiment

[0037] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be described in detail below in combination with the text description and examples.

[0038] In the CPU+GPU cooperative parallel computing dynamic load balancing method described in the present invention, the software functions and operating procedures are summarized:

[0039] 1) Main thread parameter preprocessing;

[0040] 2) The main thread scans the GPU device model and quantity, and creates a structured device attribute (Handle) for each GPU device;

[0041] 3) The main thread performs other initialization operations, such as creating a progress bar, creating an output data body control handle, etc.;

[0042] 4) The main thread determines the number of enabled GPU devices N and the number of CPU computing cores M according to the input parameters;

[0043] 5) Main thread initialization (device) control thread parameter array;

[0044] 6) T...

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Abstract

The invention discloses a dynamic load balancing method for CPU+GPU CPPC. The method mainly comprises the steps that in a single node, a main thread processes input parameters and finishes the corresponding initialization operation, 1+N computing equipment control threads are established, CPU devices and N GPU devices in the node are respectively controlled, a CPU control thread establishes a plurality of parallel computing threads according to the computing nuclear number in the node, a dynamic load balancing scheme is adopted between the CPU devices and the GPU devices, and optimization of the parallel efficiency is achieved. The number of enabled GPU calculating devices and the number of CPU computing threads can be manually allocated according to the user demand. According to the dynamic load balancing method, a pure CPU architecture platform and a CPU+GPU mixed architecture framework platform are combined in the load balancing scheme, a work station system with the various different types of GPU devices is supported, and the platform adaptability, the parallel efficiency and the overall running performance of software are greatly improved.

Description

technical field [0001] The invention relates to the field of computer high-performance computing and scientific computing, and in particular to a CPU+GPU cooperative parallel computing dynamic load balancing method. Background technique [0002] Driven by new technologies, hardware systems are undergoing rapid evolution, showing better performance and lower prices, such as the development of traditional CPUs from single-core to multi-core to many-core. With the popularization of multi-core architecture processors, multi-threaded parallel processing of application software will gradually become the mainstream. In addition, in addition to traditional applications (graphics display, mostly used in games), GPU is increasingly used in mathematical calculations due to its super floating-point computing capabilities, and has gradually entered the mainstream of computing. High-level languages ​​and development tools for GPU programming have also begun to emerge in large numbers. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50
Inventor 吴庆张广勇吴韶华王娅娟
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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