A Low-Cost On-Chip Oscillator

Abstract

The invention provides a novel on-chip oscillator circuit structure which can save the chip area and lower chip manufacturing and design cost to a large extent. An on-chip oscillator comprises a comparator, a bias current generator, a reference voltage generating circuit and a charging closed circuit. Bias currents provided by the bias current generator are respectively connected into the reference voltage generating circuit and the charging closed circuit, a bias current source K*IB is formed in the reference voltage generating circuit, and a bias current source IB is formed in the charging closed circuit. The bias current source K*IB in the reference voltage generating circuit and a resistor R0 are connected in series and are grounded, and a voltage dividing node is located between the bias current source K*IB and the resistor R0. The on-chip oscillator has the advantages in a traditional scheme, and can save the chip area and lower chip manufacturing cost to a large extent; for engineering personnel, the difficulty for cyclic calculation and circuit design is lowered, and the design and development time of chips is shortened.

Description

technical field [0001] The invention relates to an on-chip oscillator. Background technique [0002] After the enable signal arrives, the oscillator oscillates internally, generates and outputs a clock signal of a certain frequency, and provides it to the digital system or other digital modules to make it work in an orderly manner. The oscillator can be integrated on the same silicon chip with other circuit blocks to form an on-chip oscillator. [0003] see figure 1 , 2 The schematic diagram and waveform diagram of the traditional scheme shown. Among them: resistors R1 and R2 are divided in series to provide a reference voltage for the comparator; resistor R0 and capacitor C0 form an RC charging path; switch A and switch B work in opposite phases; the bias current generator provides the comparator with its working conditions The required bias current; the two frequency division circuit divides the frequency of the pulse signal to obtain a clock signal with a duty cycle o...

AI Technical Summary

Problems solved by technology

In order to reduce the current consumption of the oscillator, it is generally necessary to use larger resistance values ​​of R1 and R2, resulting in further occupying more layout area and increasing the cost of the chip

[0016] (3) The factor ln[(R1+R2) / R1] is a nonlinear function. If you want to adjust the oscillation period linearly through it, it will bring certain difficulties to the calculation and design, and also prolong the design and development time of the chip.

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