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FIR (finite impulse response) filter structure for low-power fault-tolerant circuit

A filter structure, fault-tolerant circuit technology, applied in the fields of instruments, electrical digital data processing, special data processing applications, etc., can solve the problem that the operation unit does not meet the activation probability of the VOS critical path and is not suitable for low-power applications, and achieves voltage and power consumption reduction, the effect of reducing circuit area and power consumption

Active Publication Date: 2014-07-30
FUDAN UNIV
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Problems solved by technology

Traditional arithmetic units usually use signed two’s complement form, and signed arithmetic has a characteristic, if the operand fluctuates frequently around 0, then the critical path of the circuit will be frequently activated, so the traditional arithmetic unit does not meet the requirements of VOS. Critical path activation probability requirements, so it is not suitable for VOS-based low-power applications

Method used

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  • FIR (finite impulse response) filter structure for low-power fault-tolerant circuit
  • FIR (finite impulse response) filter structure for low-power fault-tolerant circuit
  • FIR (finite impulse response) filter structure for low-power fault-tolerant circuit

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Embodiment Construction

[0018] Such as figure 1 As shown, first add a transcoding logic unit at the input of the filter to convert the two’s complement code (N bits) into a sign-magnitude representation (N+1 bits), and then input the transcoded binary number to each In a multiply-accumulator, and inside the multiply-accumulate, the sign and magnitude are calculated separately, and its structure is as follows image 3 As shown, a residual bit needs to be added when calculating the amplitude inside the multiplier-adder. In order to reduce the length of the critical path, the present invention propagates it separately and adds it together at the final output. The output of the filter also has a transcoding logic unit, which is responsible for converting the binary number represented by the sign-amplitude into two's complement code. The structure of the transcoding logic is as follows figure 2 shown.

[0019] In order to reduce the area and power consumption overhead of the multiplier, the present inv...

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Abstract

The invention belongs to the technical field of low-power integrated circuits, and particularly relates to an FIR (finite impulse response) filter structure for a low-power fault-tolerant circuit. The FIR filter structure mainly includes transcoding logical units, multiplier-accumulators (MACs), and a residual bit transmission chain, wherein the transcoding logical units are used for conversion between the two's complement and sign-magnitude binary numbers; each MAC mainly includes a sign processing unit, a Wallace tree, a last-stage accumulator and a magnitude computing logical unit; a residual bit is produced by each MAC and transmitted individually, and all the residual bits are added up at the last stage, so as to shorten the critical path. The FIR filter structure for the low-power fault-tolerant circuit has the characteristics of simple structure, small area overhead, low critical path activation probability and the like, and is particularly suitable for a low-power fault-tolerant digital signal processing system based on the VOS (voltage over-scaling) technology.

Description

technical field [0001] The invention belongs to the technical field of low-power integrated circuits, and in particular relates to a FIR filter structure suitable for low-power fault-tolerant circuits. Background technique [0002] With the rapid development of mobile devices, portable electronics, communications and other consumer electronics markets, reducing power consumption has become one of the most important issues in digital system design in many application fields. The market demand for low power consumption has led to the emergence of many low power consumption technologies. Currently, low power consumption technologies commonly used in the industry include clock gating, voltage gating, and multi-voltage domain design. In recent years, researchers have proposed the voltage over-scaling technology (VOS: Voltage Over Scaling). The principle is to artificially reduce the voltage to reduce power consumption. Error correction; in the end, the circuit system will greatl...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 韩军陈梦远张益成曾晓洋
Owner FUDAN UNIV
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