Router fault-tolerant method based on fault channel separation detection in NoC

An on-chip network and router technology, applied in the field of router fault tolerance based on fault channel isolation and detection, can solve problems such as area and power consumption overhead, achieve the effects of reducing complexity, improving network performance, and reducing overhead

Active Publication Date: 2014-09-17
黄山市开发投资集团有限公司
View PDF4 Cites 14 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Redundancy reinforcement is performed on the entire router, so that the reliability of the circuit must be guaranteed, but the area and power consumption overhead caused by the use of multi-mode redundancy for large components is unacceptable for general networks

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Router fault-tolerant method based on fault channel separation detection in NoC
  • Router fault-tolerant method based on fault channel separation detection in NoC
  • Router fault-tolerant method based on fault channel separation detection in NoC

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0035] A router fault-tolerant method based on fault channel isolation detection in a network on chip, the operation steps are as follows:

[0036] a. When a data packet transmission request arrives, query the fault channel vector table to find out the corresponding fault state of the request channel. If the request channel is not faulty, the data packet will be transmitted to the output port through the request channel. If the request channel has a permanent failure, then the The data packet turns to request the redundant channel, and then is transmitted to the output port by the redundant channel;

[0037] b. After the data packet arrives at the output port, ECC detection is performed. If there is no error in the data bit, the data is transmitted normally. If there is a single error in the data bit, it will be automatically corrected and then transmitted. c;

[0038] c. If there is a multi-bit error in the data bit, notify the upstream router to retransmit the data in the f...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a router fault-tolerant method based on fault channel separation detection in a NoC. A fault channel separation detection technology is used for detecting the channel fault in a router, so that fault detection does not influence normal data transmission; a Buffer with a recovery pointer is used for temporarily storing transmitted data and for retransmitting wrong data in a fault channel so as to reduce the fault-tolerant spending of the router; meanwhile, a redundancy channel is additionally arranged to be used for transmitting the data in a permanent fault channel. According to the router fault-tolerant method based on fault channel separation detection in the NoC, a low hardware cost is used, normal data transmission can be conducted during fault detection, so that network delay is lowered, and the network throughput is improved.

Description

technical field [0001] The invention relates to the technical field of fault-tolerant integrated circuit chip design, in particular to a router fault-tolerant method based on fault channel isolation detection in an on-chip network. Background technique [0002] Network-on-Chip (NoC, Network-on-Chip) provides efficient communication between different cores of a multiprocessor system-on-chip. Compared with a bus-based system-on-chip (SoC, System-on-Chip), it has high The advantages of delay and scalability. A typical on-chip network system is composed of routers, communication links and resource nodes (processor units or IP cores, etc.). [0003] However, with the continuous reduction of the size of the transistor industry and the gradual increase of the network scale, circuit unreliability problems caused by process instability, manufacturing process variation and degradation, electromigration, etc. are becoming more and more serious. It is an indispensable branch in th...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/24H04L1/18H04L12/771H04L45/60
Inventor 欧阳一鸣陈义军黄正峰梁华国汪秀敏易茂祥陈田安鑫
Owner 黄山市开发投资集团有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products