Detection method for under-etching of through holes

Abstract

The invention discloses a detection method for under-etching of through holes. The method comprises the following steps: a plurality of test modules are built on the substrate of a semiconductor, each test module simulates an SRAM device structure and comprises two simulation transmission gate transistors, two simulation pull-up transistors and two simulation pull-down transistors; the simulation transmission gate transistors, the simulation pull-up transistors and the simulation pull-down transistors are NMOS devices in a P trap, and a grid electrode is not formed in the active area of each simulation transmission gate transistor; a plurality of contact holes filled with metal are formed in each test module; the contact holes are connected with the position, corresponding to the grid electrode, of the active area of each simulation transmission gate transistor at least; metal interconnecting wires and conductive through holes are formed in the contact holes; test modules are scanned under the positive potential condition by an electron beam defect scanner, and the defect of under-etching of through holes of the test modules is detected according to image characteristic patterns obtained through scanning. The method provided by the invention can increase the capturing rate of the defect of under-etching.

Description

technical field [0001] The invention relates to semiconductor manufacturing technology, in particular to a method for detecting insufficient etching of through holes. Background technique [0002] With the development of integrated circuit technology and the scaling down of critical dimensions, the etching of copper connection vias in the back-end process of semiconductor devices is insufficient (such as figure 1 Shown) and via missing defects are increasingly becoming one of the bottlenecks hindering the development of integrated circuits. For example, in the etching process of first etching the hard mask (Hard Mask Etch) and then etching the through hole (All in One Etch), the under-etching defects are often affected by the cleaning process after the hard mask etching, the via etching itself and the via etching. The common influence of the photolithography process, when some of the process windows are not optimized enough, defects will appear, which becomes a major killer...

AI Technical Summary

Problems solved by technology

[0004] Therefore, the above two detection methods for insufficient via etching have great shortcomings, and it is difficult to provide an effective reference for the optimization of the online process window

Images