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Constant-current JFET (Junction Field Effect Transistor) device and manufacturing method thereof

A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of low cost and poor constant current accuracy, and achieve the effect of improving constant current performance and good constant current characteristics

Inactive Publication Date: 2014-12-10
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Its driving circuit has a simple structure and extremely low cost, and the core of providing constant current is a normally-on n-channel JFET device. However, the current JFET device has poor constant current accuracy and cannot well meet the application of constant current source circuits.

Method used

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  • Constant-current JFET (Junction Field Effect Transistor) device and manufacturing method thereof
  • Constant-current JFET (Junction Field Effect Transistor) device and manufacturing method thereof
  • Constant-current JFET (Junction Field Effect Transistor) device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0055] Both gate regions in this example are formed using three lithography-three different implant energies, specifically:

[0056] Step 1: Select an NTD single wafer with fewer defects. The thickness of the single wafer ranges from 400 to 700 μm, and the resistivity ranges from 0.01 to 0.5 Ω·cm. After marking, cleaning and drying, for example, Figure 5 shown;

[0057] The second step: the first photolithography, first grow a thin oxide layer on the wafer, and then perform the first implantation of the back gate region 2 of the P+ buried layer, specifically implantation with glue, and the ion implantation conditions are: dose 1e15 ~8e18cm -2 , energy 20 ~ 40KeV, such as Figure 6 shown;

[0058] The third step: the second photolithography, the second implantation of the gate region 2 on the back of the P+ buried layer; specifically, implantation with glue is used, and the ion implantation conditions are: dose 1e15-8e18cm -2 , Energy 20~60KeV, such as Figure 7 shown;

...

Embodiment 2

[0071] The two gate regions in this example are formed by three times of photolithography - three times of the same implantation energy - different pushing junctions, specifically:

[0072] Step 1: Select an NTD single wafer with fewer defects, with a thickness ranging from 400 to 700 μm and a resistivity ranging from 0.01 to 0.5Ω·cm, marking, cleaning, and drying for later use, such as Figure 5 shown;

[0073] The second step: the first photolithography, first grow a thin oxide layer on the wafer, and then perform the first implantation of the gate region 2 on the back of the P+ buried layer, specifically using glue implantation, the ion implantation conditions are: dose 1e15~ 8e18cm -2 , Energy 20~80KeV, push trap redistribution conditions: anaerobic condition, temperature 950~1000℃, time 25min~30min, such as Figure 6 shown;

[0074] The third step: the second photolithography, the second implantation of the gate region 2 on the back of the P+ buried layer; specifically...

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Abstract

The invention relates to a semiconductor technology, and particularly to a constant-current JFET (Junction Field Effect Transistor) device and a manufacturing method thereof. The constant-current JFET device is characterized in that the junction depths of a P+ surface grid electrode region 5 and a P+ back grid electrode region 2 are un-uniform; the junction depth of the P+ surface grid electrode region 5 from one end near an N+ drain electrode region 6 to one end ear an N+ source electrode region 7 is increased gradually; the junction depth of the P+ back grid electrode region 2 from one end near the N+ drain electrode region 6 to one end near the N+ source electrode region 7 is increased gradually. The constant-current JFET device has the beneficial effects of being relatively good in constant-current characteristic and capable of meeting the demand on smaller constant-current precision. The invention is particularly suitable for the constant-current JFET device and the manufacturing thereof.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a constant current JFET device and a manufacturing method thereof. Background technique [0002] With the widespread use of LED lamps, LED constant current drivers are rapidly occupying the market. The constant current JFET device is a constant current driver designed for low-power LEDs. It can achieve constant current output in a wide voltage range from 4V to 150V, and It can achieve ±15% constant current accuracy, can be matched with LED lamp beads, and is widely used in indoor lighting. figure 1 It is a solution for driving LEDs with constant current. Due to the high output voltage, this solution is especially suitable for LED applications with a current value of 5mA to 500mA, especially for high-voltage LEDs. The scheme includes a total of 6 components, simple and practical, and low cost. figure 1 Among them, the AC mains directly drives the constant current device and the LED li...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/808H01L29/423H01L21/337
CPCH01L29/66901H01L29/808
Inventor 李泽宏赖亚明刘建张建刚刘永伍济
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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