Periodic signal generating device
A periodic signal and generating device technology, which is applied in the direction of pulse train generator, information storage, digital memory information, etc., can solve the problem of increased packaging cost and other issues
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no. 1 example
[0052] Figure 5 , Figure 6 , Figure 7 and Figure 8 Respectively show the schematic block diagram, the circuit diagram, the waveform diagram of the output DOUT signal and the DOUT voltage, the lower limit reference voltage of the slight oscillation, the output voltage of the voltage comparator, the output voltage of the first inverter, the output voltage of the first inverter according to the first embodiment of the present invention. Simulation waveforms of the output voltage of the second inverter and the output voltage of the third inverter changing with time respectively. Refer below Figure 5 , Figure 6 , Figure 7 and Figure 8 A first embodiment according to the present invention will be described in detail.
[0053] Such as Figure 5 As shown, in the first embodiment of the present invention, in the periodic signal generating device, the micro-oscillation reference voltage generating unit includes: a micro-oscillation lower-limit reference voltage source fo...
no. 2 example
[0062] Refer below Figure 9 , 10 , 11 and 12 to describe the second embodiment according to the present invention.
[0063] Figure 9 A schematic block diagram of a second embodiment according to the invention is shown. Figure 10 A circuit diagram according to a second embodiment of the present invention is shown. Such as Figure 9 and 10 As shown, in the second embodiment of the present invention, in the periodic signal generating device, the micro-amplitude oscillation reference voltage generation unit is a double-limited reference voltage source, which is used to generate Control output micro-oscillation lower limit reference voltage V LOWER or slightly oscillating upper limit reference voltage V UPPER . The dual-limit reference voltage source includes a resistor R1, a resistor R2, a field effect transistor N3, a resistor R3, a switch P2 of the dual-limit reference voltage source, an amplifier and a DC voltage source LDO.
[0064] In the second embodiment of the ...
no. 3 example
[0071] Figure 13 A circuit diagram according to a third embodiment of the present invention is shown. Since the difference between the third embodiment of the present invention and the second embodiment is only in the dual-limit reference voltage source, the description of other parts and working principle of the third embodiment of the present invention is omitted here.
[0072] The following reference Figure 13 The dual-limit reference voltage source of the third embodiment of the present invention will be described in detail. In this embodiment, 8051 single-chip MCU is used. The value 3.58V of the upper limit reference voltage of the slight oscillation and the value 3.52V of the lower limit reference voltage of the slight oscillation are pre-stored in the memory unit of the MCU in binary form. MCU has external interrupts INT0 and INT1, such as Figure 13 shown in . INT0 and INT1 can be set as level-triggered or jump-triggered. In this embodiment, a transition trigge...
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