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Method and device for controlling high-speed serial storage

A storage control and high-speed serial technology, which is applied in the field of high-speed serial storage control and high-speed serial storage control devices, can solve the problems of multiple external interfaces, signal line interference, complex internal structure, etc., and achieve high data reliability, Realize the effect of large capacity and high speed transmission

Active Publication Date: 2015-03-25
SHENZHEN STATE MICROELECTRONICS CO LTD
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  • Application Information

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Problems solved by technology

However, due to its complex internal structure and large occupied area, it is not suitable for integrating large-capacity storage applications. Even if it is integrated into a large-capacity SRAM, it has many external interfaces, and the reliability of data transmission is not high, so it is vulnerable to signal traces. Various disturbances

Method used

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  • Method and device for controlling high-speed serial storage
  • Method and device for controlling high-speed serial storage
  • Method and device for controlling high-speed serial storage

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Embodiment Construction

[0027] It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0028] Such as figure 1 Shown, a kind of high-speed serial memory control method, it comprises the steps: S1, define write data packet format and / or read data packet format; S2, establish the communication link of multiple data channels and make multiple data channels align; S3, parsing the data packet according to the defined write data packet format and / or read data packet format; S4, reading / writing the memory.

[0029] Preferably, the write data packet format described in step S1 includes two parts of a data packet header and a data packet payload, and the described data packet header includes a data packet length, an operation address and an operation type; the described data packet length specifies the The data length of the data packet payload transmission, the operation address is used to identify...

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Abstract

The invention discloses a method and device for controlling high-speed serial storage. The method includes the steps of S1, defining a data package writing format and / or a data package reading format; S2, building a communication chain of a plurality of data channels, and aligning the multiple data channels; S3, analyzing a data package according to the defined data package writing format and / or the defined data package reading format; S4, carrying out writing / reading on a memory. The device comprises at least one high-speed serial channel, a high-speed serial interface control module, a protocol processing module and a storage control module. According to the method and device, due to protocol conversion and storage control, the perfect combination of the high throughput rate of a high-speed serial interface and rapid reading or rapid writing of a static random access memory is achieved, the extensible design of the number of the channels of the high-speed serial interface and the capacity of the static random access memory is achieved, then a storage body large in capacity, high in speed and high in intensity is built, and the method and device further have the advantages of being simple in interface and high in data reliability. The method and device can be widely applied to various high-speed serial storage control systems.

Description

technical field [0001] The invention relates to the field of data transmission and storage, in particular to a high-speed serial storage control method, and also relates to a high-speed serial storage control device. Background technique [0002] Memory has always occupied about 1 / 3 of the integrated circuit market. Static Random Access Memory (SRAM: Static Random Access Memory) occupies a large share in the memory application market due to its advantages of fast reading and writing and low power consumption, especially for reading and writing. Embedded fields with high write latency and power consumption requirements. However, due to its complex internal structure and large occupied area, it is not suitable for integrating large-capacity storage applications. Even if it is integrated into a large-capacity SRAM, it has many external interfaces, and the reliability of data transmission is not high, so it is vulnerable to signal traces. All kinds of distractions. [0003] Du...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16
CPCG06F13/1668G06F13/4286
Inventor 何凯王黎明王文青刘建新
Owner SHENZHEN STATE MICROELECTRONICS CO LTD
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