Shallow trench isolation structure and manufacturing method thereof

Abstract

The invention discloses a shallow trench isolation structure and a manufacturing method of the shallow trench isolation structure. The manufacturing method comprises the following steps that a semiconductor base material is provided and comprises a first polycrystalline silicon layer and an etching stop layer, the first polycrystalline silicon layer is provided with a first conductive type, and the etching stop layer is located above the first polycrystalline silicon layer; the semiconductor base material is etched to form a shallow trench; a filling oxidation layer is formed in the shallow trench, and the whole filling oxidation layer is lower than the etching stop layer; a second polycrystalline silicon layer is formed to cover the shallow trench, the filling oxidation layer and the etching stop layer, and is provided with a first conductive type; the etching stop layer and the part, on the etching stop layer, of the second polycrystalline silicon layer are removed so that the first polycrystalline silicon layer can be exposed, and a flat surface is formed by the upper edge of the first polycrystalline silicon layer and the upper edge of the second polycrystalline silicon layer.

Description

technical field [0001] The present invention relates to a shallow trench isolation structure and a manufacturing method thereof, and in particular to a shallow trench isolation structure for a peripheral area of ​​a semiconductor device and a manufacturing method thereof. Background technique [0002] Shallow Trench Isolation (STI) is an isolation technology commonly used in semiconductor processes, which can prevent leakage current (leakage current) between adjacent semiconductor elements and increase component integration (package density) ), reducing channel width erosion (channel width encroachment) and other advantages. [0003] However, the upper edge of the general STI process is prone to unevenness. If a circuit structure such as a peripheral circuit (periphery circuit) is to be formed on it, the unevenness of the upper edge of the STI will affect the peripheral circuit. The shadow etching process has a great influence. Contents of the invention [0004] The inve...

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Problems solved by technology

[0003] However, the upper edge of the general STI process is prone to unevenness. If a circuit structure such as a peripheral circuit (periphery circuit) is to be formed on it, the unevenness of the upper edge of the STI will affect the peripheral circuit. The shadow etching process has a great influence

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