Contact hole etching process, organic light-emitting display device and display device

Abstract

The invention discloses a contact hole etching hole, an organic light-emitting display device and a display device. The etching process comprises the following steps: coating a photoresist layer on a gate electrode layer to expose a through hole pattern and a gate electrode pattern; according to the through hole pattern, etching the gate electrode layer and a first insulating layer in sequence along the substrate thickness direction to form a contact hole figure, removing the through hole pattern of the photoresist layer to etch out a gate electrode figure; arranging a membrane in the molded gate electrode figure and the molded contact hole figure to form an interlayer medium layer, performing photoetching treatment on the interlayer medium layer to expose the contact hole figure; etching the interlayer medium layer and the residual first insulating layer in the contact hole figure to obtain a complete contact hole figure. The etching and molding of the contact hole can be completed only by dry-process etching, the first insulating layer at the lower layer is firstly etched and then the interlayer medium layer on the upper face is etched, so that the problems that the contact hole etching process is difficult in hole depth etching and the etching end point is difficult to detect are avoided.

Description

technical field [0001] The invention relates to the field of manufacturing flat panel display devices, in particular to a contact hole etching process, an organic light-emitting display device and a display device. Background technique [0002] At present, there are the following technical problems in the etching process of contact holes in the low temperature polysilicon technology LTPS (Low Temperature Poly-silicon) process: [0003] 1) The film layer to be etched is very thick (interlayer dielectric layer: first insulating layer ), the pore is deep and the pore diameter becomes smaller as it goes down. During the reaction process, it is easy to cause the reactant to fail to discharge in time and the etching stop phenomenon occurs; if the etching stop is avoided by prolonging the etching time or increasing the bias power (Bias Power) , it will lead to a relatively large line width loss (CD Loss), which will affect the electrical performance of the device; [0004] 2) ...

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Problems solved by technology

[0003] 1) The film layer to be etched is very thick (interlayer dielectric layer: first insulating layer ), the pore is deep and the pore diameter becomes smaller as it goes down. During the reaction process, it is easy to cause the reactant to fail to discharge in time and the etching stop phenomenon occurs; if the etching stop is avoided by prolonging the etching time or increasing the bias power (Bias Power) , it will lead to a relatively large line width loss (CD Loss), which will affect the electrical performance of the device;

[0004] 2) The end point of etching is difficult to detect, resulting in over-etching of the polysilicon layer, and a large over-etching of the polysilicon layer will affect the electrical performance of the device

Since wet etching can effectively avoid over-etching of the polysilicon layer, it needs to increase the transportation process of the device to be etched between the dry etching area and the wet etching area, and the process is cumbersome

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