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Expandable fpga display system, method and electronic device with microprocessor mcu

A microprocessor and display system technology, applied in the field of FPGA, can solve problems such as tight FPGA design timing, potential safety hazards, and changes in the output address of external memory, and achieve the effect of reducing potential safety hazards and improving utilization rate

Active Publication Date: 2018-03-30
CAPITAL MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, this will cause frequent and large changes in the output address of the external memory, resulting in tight FPGA design timing and unable to fully utilize the bandwidth of the external memory.
In addition, as the display screen increases, the requirements for bandwidth and timing will also increase accordingly, so this design method cannot meet the display output of large screens.
More importantly, screens with different resolutions have different requirements for the output pclk (pixie clock, pixel clock). The pclk in traditional designs usually comes from different frequency divisions of the system clock, so that when the design is transplanted to a display with different specifications, The changes will be very large, so the portability is low
In addition, when the FPGA processes instructions and data from the asynchronous clock domain MCU, there are usually certain security risks

Method used

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  • Expandable fpga display system, method and electronic device with microprocessor mcu

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Embodiment 1

[0025] figure 2 It is a structural diagram of the FPGA with MCU in the embodiment of the present invention when the FIFO is fully asynchronous. in figure 2 In the embodiment of the present invention, the structure diagram when the FIFO is fully asynchronous includes: at least one first FIFO is an asynchronous FIFO, a logic module, a second asynchronous FIFO, an LCD module, an LCD address generator, and a state machine controller.

[0026] Expandable FPGA electronic equipment with microprocessor MCU, including the above-mentioned modules, MCU, external memory and display screen.

[0027] Specifically, the state machine controller makes the FPGA perform different operations on the external memory in different states. The states that the state machine controller needs to control include: idle state, that is, no operation; display output state, read data in the external memory for display output according to the empty and full states of the second asynchronous FIFO, so as to ensure t...

Embodiment 2

[0036] image 3 It is a structural diagram of the FPGA with MCU in the second embodiment of the present invention when the FIFO is synchronously shaped and synchronized. in image 3 In the MCU without clock, at least one of the first FIFOs is a synchronous shaping plus synchronous FIFO, and the system also includes at least two registers. After the registers perform synchronous shaping on the MCU data, the data is written into the synchronous FIFO. . Shaping refers to adjusting the input signal to a pulse signal according to the system clock. The signal received by FPGA first passes through multiple registers and samples the control signal and data from the slower clock domain multiple times and logically combines them to complete synchronous shaping and send the data to the first FIFO.

[0037] Taking the display method used in synchronous shaping and synchronous FIFO structure as an example, the modes of the external MCU are write single point, eight points, fill and move re...

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Abstract

The invention relates to an expandable FPGA display system with a microprocessor MCU, which loads the data of the MCU to an external memory, and at the same time, based on the current display state of the display screen, reads out the data in the external memory for display on the display screen, including : at least one first FIFO, receiving the data of MCU; logic module, calculating the display address of the data; the second asynchronous FIFO, reading the data of the external memory according to the address; LCD module, according to the display parameters of the display screen, the The data drives the display screen; the LCD address generator generates an effective address according to the effective video area signal of the display screen; the state machine controller, according to the request of at least one FIFO, inputs the data in at least one first FIFO to the external memory according to the display address ; According to the request of the second asynchronous FIFO, read data from the external memory to the second asynchronous FIFO. The invention has high utilization rate of external memory bandwidth and good portability.

Description

Technical field [0001] The present invention relates to FPGA, in particular to an expandable FPGA display system, method and electronic device with a microprocessor MCU. Background technique [0002] FPGA (Field Programmable Gate Array) is a programmable logic device with abundant hardware resources and powerful parallel processing capabilities. These features make FPGAs have been more and more widely used in many fields such as data processing, communication, and networking. With the continuous development of multimedia devices, especially LCD (Liquid Crystal Display, liquid crystal screen) and consumer electronic devices, consumers' demand for screen displays is constantly increasing. With the continuous increase of display screens, the requirements for hardware systems are also increasing. MCU (Microcontroller Unit, microprocessor) is far from being able to meet the demand for display. The traditional method is to add FPGA and external memory, so that FPGA accepts data and ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/14
Inventor 何轲刘明
Owner CAPITAL MICROELECTRONICS