Storage management module in on-chip network message buffering area

Abstract

The invention relates to a storage management module in an on-chip network message buffering area and belongs to the field of computer architecture and chip design. The storage management module is used for distribution and recovery of storage units in the buffering area when all ports of on-chip network computing nodes receive and forward messages. A multi-port synchronous access mode is adopted for the storage management module, and the multiple ports can apply for or release the storage units in the message buffering area. A predistribution strategy is adopted in the process for applying for the storage units, the storage units are not distributed in the applying process but pre-distributed for the ports in the initialization process, and afterwards, each time the ports apply for the storage units, the storage units are pre-distributed for the next time of applying. Compared with the prior art, the distribution and recovery time of the storage units is shortened through multi-port concurrent access and strategy predistribution, so that the delay of message storing and forwarding is shortened, the storing efficiency is improved, an annular queue is used for storing addresses of the idle storage units in the buffering area, and the circuit design is simplified.

Description

technical field [0001] The invention relates to a storage management module of an on-chip network message buffer, which belongs to the field of computer architecture and chip design, and is suitable for building multi-core and many-core processor core interconnection units on a chip. Background technique [0002] With the development of multi-core and many-core processor architecture, more and more processing cores are integrated on a single chip, which puts a great demand on inter-core communication. As an effective solution for inter-core communication, on-chip network The scheme is being widely researched and adopted. In a network-on-chip architecture, data is packaged into messages and transmitted between processing cores (computing nodes). The message passing process is carried out in a store-and-forward manner. The routing modules of the computing nodes are connected. For example, the routing module of the two-dimensional grid on-chip network has four ports, east, wes...

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Problems solved by technology

[0006] The purpose of the present invention is to solve the problem of large delay in the existing storage management module, and provide a storage management module of an on-chip network message buffer. The storage management module adopts a multi-port synchronous access mode, and multiple ports can apply for or release messages at the same time. The storage unit in the buffer; when applying for the storage unit, the pre-allocation strategy is adopted to reduce the delay of message storage and forwarding

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