Fabrication method of superjunction device

Abstract

The invention discloses a manufacturing method of a super junction device. The method comprises the following steps that 1, a silicon epitaxial substrate is provided, and in addition, a hard mask layer is formed; 2, a plurality of grooves are formed through photoetching; 3, N type ions with angles are injected onto the surfaces of the bottom and the silicon epitaxial substrate arranged at the bottom and the side wall of the grooves for forming an N type ion injection layer; 4, P type epitaxial layer growth is carried out, and in addition, the grooves are filled to form P type columns. The manufacturing method has the advantage that the source drain conduction resistance of the device can be reduced.

Description

technical field [0001] The invention relates to a manufacturing process method of a semiconductor integrated circuit, in particular to a manufacturing method of a super junction device. Background technique [0002] Super Junction is composed of P-type pillars and N-type pillars arranged alternately. The carriers between P-type pillars and N-type pillars are easy to deplete each other to improve the breakdown voltage of the device. In the prior art, it is common There are two methods of super knot operation: [0003] A method of matching multiple ion implantations for multiple epitaxy, and then connecting the multiple-implanted P-type wells (Well) into a P-type column through an annealing drive in method. [0004] Another method is to grow one or two layers of epitaxy first, and hollow out the epitaxial layer that needs to be filled with P-type columns by digging trenches to form trenches, and then fill the trenches with P-type epitaxy to form P-type columns. . [0005] N...

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Problems solved by technology

[0005] No matter which method is used, it will cause a problem, that is, after the P-type column is formed, due to the inevitable thermal process in the process, and the P-type impurity of the P-type column generally adopts boron (B) element, the thermal process It will cause the B element in the P area, that is, the P-type column, to diffuse to the N area, resulting in a larger concentration of the P area, and a smaller N area, that is, the N-type column; at the same time, in order to obtain a device with a higher breakdown voltage Performance, will choose a relatively large epitaxy of RS, which eventually leads to a larger source-drain on-resistance (RDSON) than expected

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