Array substrate and manufacturing method thereof

A technology for array substrates and manufacturing methods, which is applied in the field of array substrates and array substrate manufacturing, and can solve the problems of reduced aperture ratio, too small capacitance, and reduced aperture ratio, etc.

Active Publication Date: 2015-05-27
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the increasing requirements for display performance make it a huge challenge to improve the design of pixel circuits.
E.g image 3 As mentioned above, in order to improve the short-circuit risk caused by the metal climbing in the via holes where the cathode and the anode are overlapped in the OLED, a pixel definition layer is used in the prior art to fill the via holes used for the original cathode to anode overlap ,like Figure 4 As shown, it will lead to a decrease in the aperture ratio
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Method used

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  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof

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Embodiment Construction

[0049] In order to understand the above-mentioned purpose, features and advantages of the present invention more clearly, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, in the case of no conflict, the embodiments of the present application and the features in the embodiments can be combined with each other.

[0050] In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention can also be implemented in other ways different from those described here. Therefore, the protection scope of the present invention is not limited by the specific details disclosed below. EXAMPLE LIMITATIONS.

[0051] Such as Figure 7 As shown, the array substrate according to one embodiment of the present invention includes a plurality of pixel groups 13, wherein each pixel group 13 has a plurality of su...

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Abstract

The invention relates to an array substrate, a manufacturing method thereof and a display device. The array substrate comprises a plurality of pixel groups, wherein each pixel group has a plurality of sub-pixels; each sub-pixel comprises a luminous area and a luminous layer deletion area, and a first area is limited by the luminous layer deletion area of the plurality of sub-pixels of each pixel group; a light-sensitive unit is arranged in the first area and is used for generating electrical signals according to the sensed light intensity. By virtue of the technical scheme of the invention, a non-luminous area of each sub-pixel can be fully utilized, i.e., the opening area lost by the sub-pixel is fully utilized, so that the circuit structure in the array substrate is more compact and reasonable, and furthermore the light-sensitive positioning function is also realized.

Description

technical field [0001] The present invention relates to the field of display technology, in particular, to an array substrate and a manufacturing method of the array substrate. Background technique [0002] AMOLED (Active-matrix organic light emitting diode, active matrix organic light-emitting diode) display screen has multiple TFT (Thin Film Transistor, thin-film transistor) and Multi-capacitor designs such as figure 1 The circuit structure is shown, and the corresponding pixel arrangement diagram is shown in figure 2 shown. However, the increasing requirements for display performance make it a huge challenge to improve the design of pixel circuits. E.g image 3 As mentioned above, in order to improve the short-circuit risk caused by the metal climbing in the via holes where the cathode and the anode are overlapped in the OLED, a pixel definition layer is used in the prior art to fill the via holes used for the original cathode to anode overlap ,Such as Figure 4 As...

Claims

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Application Information

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IPC IPC(8): H01L27/32H01L21/77
CPCH01L21/77H10K59/60H10K59/131H10K59/1201H10K59/38H10K59/122H10K59/1213
Inventor 辛龙宝
Owner BOE TECH GRP CO LTD
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