Method for removing dummy gate and method for forming MOS transistor

Abstract

A dummy gate removing method and an MOS transistor forming method are provided. The dummy gate removing method comprises the following steps: providing a semiconductor substrate which is provided with a gate dielectric layer, a work function layer disposed on the gate dielectric layer, and a dummy gate disposed on the work function layer; and etching the dummy gate by a pulse plasma etching process until the work function layer is exposed, wherein the etching gas for the pulse plasma etching process includes hydrogen. The dummy gate removing method of the invention can improve the performance of an MOS transistor formed subsequently.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for removing a dummy gate and a method for forming a MOS transistor. Background technique [0002] With the continuous development of semiconductor technology, the feature size of MOS transistors is continuously reduced, and the thickness of the gate dielectric layer of MOS transistors is also becoming thinner and thinner according to the principle of proportional reduction. Although the thickness of the gate dielectric layer is continuously decreasing, since the gate voltage will not continue to decrease, the electric field strength received by the gate dielectric layer will become larger, and the time-dependent dielectric breakdown (TDDB: time dependent dielectric breakdown) will also be more severe. It is easy to occur, especially in NMOS transistors, and it is more likely to cause device failure. [0003] In the prior art, a high-K gate dielectric layer is us...

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Problems solved by technology

But the TDDB characteristics of the prior art MOS transistors are still not good

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