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Manufacturing method for flash memory

A memory and flash technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as difficult control of isolation region height, floating gate reduction, etc.

Active Publication Date: 2015-06-24
GIGADEVICE SEMICON (BEIJING) INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, in the existing method for manufacturing flash memory, when the insulating material filled in the isolation region is subsequently dry-etched, the height of the floating gate will be correspondingly reduced, and the insulating material filled in the isolation region will be processed in a single step. etch, it is difficult to control the height of the isolation region

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  • Manufacturing method for flash memory
  • Manufacturing method for flash memory
  • Manufacturing method for flash memory

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Embodiment Construction

[0018] In order to make the technical problems solved by the present invention, the technical solutions adopted and the technical effects achieved clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only parts related to the present invention are shown in the drawings but not all content.

[0019] figure 1 It is a flow chart of the method for manufacturing the flash memory provided by the embodiment of the present invention. Such as figure 1 As shown, the method provided by the embodiment of the present invention includes:

[0020] Step 101 , forming a stacked structure consisting of a tunnel oxide layer, a floating gate polysilicon layer and a mask nitride layer o...

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Abstract

The invention discloses a manufacturing method for a flash memory. The flash memory comprises a unit zone and a peripheral zone surrounding the unit zone. The method comprises the steps that a laminating structure which is composed of a tunnel oxide layer, a floating gate polycrystalline silicon layer and a masking nitride layer is formed on a substrate; first isolation areas and a second isolation area are formed in the unit zone and the peripheral zone respectively; etching is carried out on the first isolation areas and the second isolation area to reach a first preset position; etching is carried out on the first isolation areas to reach a second preset position; the masking nitride layer is removed; etching is carried out on the first isolation areas and the second isolation area to reach a third preset position and a fourth preset position respectively. According to the manufacturing method for the flash memory, the performance of the flash memory can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a flash memory. Background technique [0002] As the size of the flash memory device shrinks, the size of the cells of the device also shrinks accordingly, resulting in very serious interference between cells. In order to reduce these interference phenomena, the height of the isolation area in the unit needs to be precisely controlled. At the same time, the floating gate of the device needs to maintain a certain height, which places a high requirement on the filling capability of the isolation region. [0003] The existing method for manufacturing flash memory is to directly remove the mask nitride layer after forming the active region and the isolation region on the substrate, and then etch the isolation region. [0004] However, in the existing method for manufacturing flash memory, when the insulating material filled in the isolation region ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8247H10B41/00H10B41/30H10B41/42H10B69/00
CPCH10B41/00H10B41/42H10B69/00H10B41/30
Inventor 于法波
Owner GIGADEVICE SEMICON (BEIJING) INC