Wafer level packaging structure and manufacturing method
A technology of wafer-level packaging and manufacturing methods, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of inability to realize multi-chip SIP packaging and limited application range, and achieve small and practical package size Strong performance and reduced packaging cost
Active Publication Date: 2017-07-14
NAT CENT FOR ADVANCED PACKAGING CO LTD
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Problems solved by technology
However, this packaging structure cannot realize multi-chip SIP packaging, and the scope of use is limited to single-chip packaging structures.
Method used
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Embodiment Construction
[0042] The present invention will be further described below in conjunction with specific drawings and embodiments.
[0043] Such as figure 1 with figure 2 Shown: It is a schematic diagram of the packaging structure obtained by using wafer-level chip packaging (WL-CSP) technology, specifically, a number of IC chips 20 are arranged on the wafer substrate 19, and the IC chips 20 adopt the form of wafer-level chip packaging Carry out encapsulation, after the IC chip 20 on the wafer substrate 19 is cut, obtain such as figure 2 Single device shown. In a single device, a chip passivation layer 22 is set on the surface of the IC chip 20, and the chip passivation layer 22 covers the surface of the IC chip 20, and the IC chip 20 is connected to the chip tin by the connecting electrode in the chip passivation layer 22. The balls 21 are electrically connected, and the IC chip 20 is connected to other packaging structures through the chip solder balls 21 . It can be seen from the fo...
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The invention relates to a wafer-level packaging structure and a manufacturing method, which includes a wafer chip, on which a wafer bonding pad is arranged on the front surface of the wafer chip; A functional chip is plastic-encapsulated, and the functional chip is electrically connected to the surface conductive electrode on the front side of the wafer chip through a lead wire. The surface conductive electrode is located at one end of the chip surface wire layer and is electrically connected to the wafer pad through the chip surface wire layer. Connection; the outer surface of the plastic cover is provided with a connection conductive electrode, the connection conductive electrode is electrically connected to the surface conductive electrode and the functional chip through the conductive column in the plastic cover, and a conductive solder ball is welded on the connection conductive electrode. The conductive solder balls are electrically connected to the connecting conductive electrodes. The packaging structure of the invention is compact, can realize multi-chip wafer-level packaging and SIP packaging, improves the application range of packaging, and is safe and reliable.
Description
technical field [0001] The invention relates to a packaging structure and a manufacturing method, in particular to a wafer-level packaging structure and a manufacturing method, belonging to the technical field of semiconductor packaging. Background technique [0002] Wafer-level chip packaging (WL-CSP) technology is a technology that performs packaging and testing on the entire wafer and then cuts it to obtain a single finished chip. The size of the packaged chip is the same as that of the bare chip. Wafer-level chip-scale packaging technology changes traditional packaging, such as ceramic leadless chip carriers, organic leadless chip carriers and digital camera module models, and conforms to the market's increasingly light, thin, short, small and low-cost microelectronics products. Valuation requirements. The chip size after wafer-level chip size packaging has reached a high degree of miniaturization, and the cost of the chip is significantly reduced with the reduction of ...
Claims
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IPC IPC(8): H01L23/31H01L23/48H01L21/768
CPCH01L2924/181H01L24/97H01L2224/48091H01L2924/1532H01L2224/32225H01L2224/48227H01L2924/15321H01L2224/97H01L2924/00014H01L2924/00012H01L2224/83H01L2224/85
Inventor 徐健孙鹏
Owner NAT CENT FOR ADVANCED PACKAGING CO LTD